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drm/amd/display: Revert commit Update Interface to Check UCLK DPM

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This reverts commit b8d046985c.

Reverting as regression discovered on certain systems and golden values
need to updated.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Austin Zheng <Austin.Zheng@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Austin Zheng
2024-09-23 10:07:32 -04:00
committed by Alex Deucher
parent bd5230b1a6
commit 0e93b76cf9
5 changed files with 1 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
drivers/gpu/drm/amd/display/dc/core/dc.c
View File

@@ -6038,15 +6038,8 @@ void dc_set_edp_power(const struct dc *dc, struct dc_link *edp_link,
struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state *context)
{
struct dc_power_profile profile = { 0 };
struct dc *dc = NULL;
if (!context || !context->clk_mgr || !context->clk_mgr->ctx || !context->clk_mgr->ctx->dc)
return profile;
dc = context->clk_mgr->ctx->dc;
if (dc->res_pool->funcs->get_power_profile)
profile.power_level = dc->res_pool->funcs->get_power_profile(context);
profile.power_level += !context->bw_ctx.bw.dcn.clk.p_state_change_support;
return profile;
}

1
drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
View File

@@ -1798,7 +1798,6 @@ bool pmo_dcn4_fams2_init_for_pstate_support(struct dml2_pmo_init_for_pstate_supp
}
if (s->pmo_dcn4.num_pstate_candidates > 0) {
s->pmo_dcn4.pstate_strategy_candidates[s->pmo_dcn4.num_pstate_candidates-1].allow_state_increase = true;
s->pmo_dcn4.cur_pstate_candidate = -1;
return true;
} else {

4
drivers/gpu/drm/amd/display/dc/inc/core_types.h
View File

@@ -215,10 +215,6 @@ struct resource_funcs {
void (*get_panel_config_defaults)(struct dc_panel_config *panel_config);
void (*build_pipe_pix_clk_params)(struct pipe_ctx *pipe_ctx);
/*
* Get indicator of power from a context that went through full validation
*/
int (*get_power_profile)(const struct dc_state *context);
};
struct audio_support{

6
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
View File

@@ -1812,11 +1812,6 @@ static void dcn315_get_panel_config_defaults(struct dc_panel_config *panel_confi
*panel_config = panel_config_defaults;
}
static int dcn315_get_power_profile(const struct dc_state *context)
{
return !context->bw_ctx.bw.dcn.clk.p_state_change_support;
}
static struct dc_cap_funcs cap_funcs = {
.get_dcc_compression_cap = dcn20_get_dcc_compression_cap
};
@@ -1845,7 +1840,6 @@ static struct resource_funcs dcn315_res_pool_funcs = {
.update_bw_bounding_box = dcn315_update_bw_bounding_box,
.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,
.get_panel_config_defaults = dcn315_get_panel_config_defaults,
.get_power_profile = dcn315_get_power_profile,
};
static bool dcn315_resource_construct(

17
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
View File

@@ -1688,22 +1688,6 @@ static void dcn401_build_pipe_pix_clk_params(struct pipe_ctx *pipe_ctx)
}
}
static int dcn401_get_power_profile(const struct dc_state *context)
{
int uclk_mhz = context->bw_ctx.bw.dcn.clk.dramclk_khz / 1000;
int dpm_level = 0;
for (int i = 0; i < context->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; i++) {
if (context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz == 0 ||
uclk_mhz < context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz)
break;
if (uclk_mhz > context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz)
dpm_level++;
}
return dpm_level;
}
static struct resource_funcs dcn401_res_pool_funcs = {
.destroy = dcn401_destroy_resource_pool,
.link_enc_create = dcn401_link_encoder_create,
@@ -1730,7 +1714,6 @@ static struct resource_funcs dcn401_res_pool_funcs = {
.prepare_mcache_programming = dcn401_prepare_mcache_programming,
.build_pipe_pix_clk_params = dcn401_build_pipe_pix_clk_params,
.calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes,
.get_power_profile = dcn401_get_power_profile,
};
static uint32_t read_pipe_fuses(struct dc_context *ctx)