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arm64: tegra: Fix CPU compatible string to cortex-a78ae on Tegra234

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The Tegra234 SoC uses Cortex-A78AE cores, not Cortex-A78. Update the
compatible string for all CPU nodes to match the actual hardware.

Tegra234 hardware reports:
  # head /proc/cpuinfo | egrep 'implementer|part'
  CPU implementer : 0x41
  CPU part        : 0xd42

Which maps to (from arch/arm64/include/asm/cputype.h):
  #define ARM_CPU_IMP_ARM              0x41
  #define ARM_CPU_PART_CORTEX_A78AE    0xD42

Fixes: a12cf5c339 ("arm64: tegra: Describe Tegra234 CPU hierarchy")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Sumit Gupta
2026-01-21 16:15:34 +05:30
committed by Thierry Reding
parent ee7863e432
commit 0dfa1e960f
1 changed files with 12 additions and 12 deletions
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24
arch/arm64/boot/dts/nvidia/tegra234.dtsi
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@@ -5355,7 +5355,7 @@ cpus {
#size-cells = <0>;
cpu0_0: cpu@0 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x00000>;
@@ -5374,7 +5374,7 @@ cpu0_0: cpu@0 {
};
cpu0_1: cpu@100 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x00100>;
@@ -5393,7 +5393,7 @@ cpu0_1: cpu@100 {
};
cpu0_2: cpu@200 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x00200>;
@@ -5412,7 +5412,7 @@ cpu0_2: cpu@200 {
};
cpu0_3: cpu@300 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x00300>;
@@ -5431,7 +5431,7 @@ cpu0_3: cpu@300 {
};
cpu1_0: cpu@10000 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x10000>;
@@ -5450,7 +5450,7 @@ cpu1_0: cpu@10000 {
};
cpu1_1: cpu@10100 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x10100>;
@@ -5469,7 +5469,7 @@ cpu1_1: cpu@10100 {
};
cpu1_2: cpu@10200 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x10200>;
@@ -5488,7 +5488,7 @@ cpu1_2: cpu@10200 {
};
cpu1_3: cpu@10300 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x10300>;
@@ -5507,7 +5507,7 @@ cpu1_3: cpu@10300 {
};
cpu2_0: cpu@20000 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x20000>;
@@ -5526,7 +5526,7 @@ cpu2_0: cpu@20000 {
};
cpu2_1: cpu@20100 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x20100>;
@@ -5545,7 +5545,7 @@ cpu2_1: cpu@20100 {
};
cpu2_2: cpu@20200 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x20200>;
@@ -5564,7 +5564,7 @@ cpu2_2: cpu@20200 {
};
cpu2_3: cpu@20300 {
compatible = "arm,cortex-a78";
compatible = "arm,cortex-a78ae";
device_type = "cpu";
reg = <0x20300>;