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ARM: dts: bcm2711: PL011 UARTs are actually r1p5
The ARM PL011 UART instances in BCM2711 are r1p5 spec, which means they
have 32-entry FIFOs. The correct periphid value for this is 0x00341011.
Thanks to N Buchwitz for pointing this out.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Link: https://lore.kernel.org/r/20250223125614.3592-2-wahrenst@gmx.net
Fixes: 7dbe8c62ce ("ARM: dts: Add minimal Raspberry Pi 4 support")
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
This commit is contained in:
committed by
Florian Fainelli
parent
f44fa354a0
commit
0de09025f1
@@ -134,7 +134,7 @@ uart2: serial@7e201400 {
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clocks = <&clocks BCM2835_CLOCK_UART>,
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<&clocks BCM2835_CLOCK_VPU>;
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clock-names = "uartclk", "apb_pclk";
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arm,primecell-periphid = <0x00241011>;
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arm,primecell-periphid = <0x00341011>;
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status = "disabled";
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};
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@@ -145,7 +145,7 @@ uart3: serial@7e201600 {
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clocks = <&clocks BCM2835_CLOCK_UART>,
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<&clocks BCM2835_CLOCK_VPU>;
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clock-names = "uartclk", "apb_pclk";
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arm,primecell-periphid = <0x00241011>;
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arm,primecell-periphid = <0x00341011>;
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status = "disabled";
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};
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@@ -156,7 +156,7 @@ uart4: serial@7e201800 {
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clocks = <&clocks BCM2835_CLOCK_UART>,
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<&clocks BCM2835_CLOCK_VPU>;
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clock-names = "uartclk", "apb_pclk";
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arm,primecell-periphid = <0x00241011>;
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arm,primecell-periphid = <0x00341011>;
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status = "disabled";
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};
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@@ -167,7 +167,7 @@ uart5: serial@7e201a00 {
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clocks = <&clocks BCM2835_CLOCK_UART>,
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<&clocks BCM2835_CLOCK_VPU>;
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clock-names = "uartclk", "apb_pclk";
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arm,primecell-periphid = <0x00241011>;
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arm,primecell-periphid = <0x00341011>;
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status = "disabled";
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};
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@@ -1178,6 +1178,7 @@ &txp {
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};
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&uart0 {
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arm,primecell-periphid = <0x00341011>;
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interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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};
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