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arm64: dts: ti: k3-j784s4-evm: Enable DisplayPort-0
Enable display for J784S4 EVM. Add assigned clocks for DSS, DT node for DisplayPort PHY and pinmux for DP HPD. Add the clock frequency for serdes_refclk. Add the endpoint nodes to describe connection from: DSS => MHDP => DisplayPort connector. Also add the GPIO expander-4 node and pinmux for main_i2c4 which is required for controlling DP power. Set status for all required nodes for DP-0 as "okay". Signed-off-by: Rahul T R <r-ravikumar@ti.com> [j-choudhary@ti.com: move all the changes together to enable DP-0 in EVM] Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20231019054022.175163-5-j-choudhary@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
committed by
Vignesh Raghavendra
parent
603669b167
commit
0da6b5d6a1
@@ -249,6 +249,28 @@ vdd_sd_dv: regulator-TLV71033 {
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states = <1800000 0x0>,
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<3300000 0x1>;
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};
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dp0_pwr_3v3: regulator-dp0-prw {
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compatible = "regulator-fixed";
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regulator-name = "dp0-pwr";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&exp4 0 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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dp0: connector-dp0 {
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compatible = "dp-connector";
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label = "DP0";
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type = "full-size";
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dp-pwr-supply = <&dp0_pwr_3v3>;
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port {
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dp0_connector_in: endpoint {
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remote-endpoint = <&dp0_out>;
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};
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};
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};
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};
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&main_pmx0 {
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@@ -289,6 +311,19 @@ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
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J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */
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>;
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};
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dp0_pins_default: dp0-default-pins {
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pinctrl-single,pins = <
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J784S4_IOPAD(0x0cc, PIN_INPUT, 12) /* (AM37) SPI0_CS0.DP0_HPD */
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>;
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};
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main_i2c4_pins_default: main-i2c4-default-pins {
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pinctrl-single,pins = <
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J784S4_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AG33) MCAN14_TX.I2C4_SCL */
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J784S4_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AH33) MCAN13_RX.I2C4_SDA */
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>;
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};
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};
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&wkup_pmx2 {
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@@ -862,3 +897,85 @@ adc {
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ti,adc-channels = <0 1 2 3 4 5 6 7>;
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};
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};
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&serdes_refclk {
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status = "okay";
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clock-frequency = <100000000>;
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};
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&dss {
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status = "okay";
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assigned-clocks = <&k3_clks 218 2>,
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<&k3_clks 218 5>,
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<&k3_clks 218 14>,
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<&k3_clks 218 18>;
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assigned-clock-parents = <&k3_clks 218 3>,
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<&k3_clks 218 7>,
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<&k3_clks 218 16>,
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<&k3_clks 218 22>;
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};
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&serdes_wiz4 {
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status = "okay";
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};
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&serdes4 {
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status = "okay";
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serdes4_dp_link: phy@0 {
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reg = <0>;
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cdns,num-lanes = <4>;
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#phy-cells = <0>;
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cdns,phy-type = <PHY_TYPE_DP>;
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resets = <&serdes_wiz4 1>, <&serdes_wiz4 2>,
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<&serdes_wiz4 3>, <&serdes_wiz4 4>;
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};
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};
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&mhdp {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&dp0_pins_default>;
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phys = <&serdes4_dp_link>;
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phy-names = "dpphy";
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};
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&dss_ports {
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/* DP */
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port {
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dpi0_out: endpoint {
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remote-endpoint = <&dp0_in>;
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};
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};
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};
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&main_i2c4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c4_pins_default>;
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clock-frequency = <400000>;
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exp4: gpio@20 {
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compatible = "ti,tca6408";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&dp0_ports {
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port@0 {
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reg = <0>;
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dp0_in: endpoint {
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remote-endpoint = <&dpi0_out>;
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};
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};
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port@4 {
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reg = <4>;
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dp0_out: endpoint {
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remote-endpoint = <&dp0_connector_in>;
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};
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};
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};
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