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ASoC: renesas: rsnd: enable to use "adg" clock

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ADG needs its MSTP to use it, and it was handled as "clk_i" before.
R-Car Gen2/Gen3 are using it, but Gen4 doesn't have it.
"clk_i" is not intuitive for ADG MSTP.
Let's enable to use "adg" clock. It can keep compatible with R-Car
Gen2/Gen3 and Gen4.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://patch.msgid.link/87sem62x00.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Kuninori Morimoto
2025-04-17 23:23:28 +00:00
committed by Mark Brown
parent a714b31225
commit 0cc88846cb
1 changed files with 19 additions and 0 deletions
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19
sound/soc/renesas/rcar/adg.c
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@@ -31,6 +31,7 @@ static struct rsnd_mod_ops adg_ops = {
#define ADG_HZ_SIZE 2
struct rsnd_adg {
struct clk *adg;
struct clk *clkin[CLKINMAX];
struct clk *clkout[CLKOUTMAX];
struct clk *null_clk;
@@ -386,6 +387,10 @@ int rsnd_adg_clk_control(struct rsnd_priv *priv, int enable)
int ret = 0, i;
if (enable) {
ret = clk_prepare_enable(adg->adg);
if (ret < 0)
return ret;
rsnd_mod_bset(adg_mod, BRGCKR, 0x80770000, adg->ckr);
rsnd_mod_write(adg_mod, BRRA, adg->brga);
rsnd_mod_write(adg_mod, BRRB, adg->brgb);
@@ -419,6 +424,10 @@ int rsnd_adg_clk_control(struct rsnd_priv *priv, int enable)
if (ret < 0)
rsnd_adg_clk_disable(priv);
/* disable adg */
if (!enable)
clk_disable_unprepare(adg->adg);
return ret;
}
@@ -475,6 +484,16 @@ static int rsnd_adg_get_clkin(struct rsnd_priv *priv)
clkin_size = ARRAY_SIZE(clkin_name_gen4);
}
/*
* get adg
* No "adg" is not error
*/
clk = devm_clk_get(dev, "adg");
if (IS_ERR_OR_NULL(clk))
clk = rsnd_adg_null_clk_get(priv);
adg->adg = clk;
/* get clkin */
for (i = 0; i < clkin_size; i++) {
clk = devm_clk_get(dev, clkin_name[i]);