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drm/i915/vga: Include the current pipe in the VGA disable debug message

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Add some debugs to the VGA plane disable so that we can at least
see from the logs when it happens (and on which pipe). I was curious
about this at some point when I was seeing some random underruns
near the time when we disable the VGA plane, but I think in the end
that turned out to be a red herring.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250417114454.12836-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä
2025-04-17 14:44:52 +03:00
parent 00efddc608
commit 0c80d60ae6
1 changed files with 28 additions and 1 deletions
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29
drivers/gpu/drm/i915/display/intel_vga.c
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@@ -15,6 +15,7 @@
#include "i915_reg.h"
#include "intel_de.h"
#include "intel_display.h"
#include "intel_vga.h"
#include "intel_vga_regs.h"
@@ -28,16 +29,42 @@ static i915_reg_t intel_vga_cntrl_reg(struct intel_display *display)
return VGACNTRL;
}
static bool has_vga_pipe_sel(struct intel_display *display)
{
if (display->platform.i845g ||
display->platform.i865g)
return false;
if (display->platform.valleyview ||
display->platform.cherryview)
return true;
return DISPLAY_VER(display) < 7;
}
/* Disable the VGA plane that we never use */
void intel_vga_disable(struct intel_display *display)
{
struct pci_dev *pdev = to_pci_dev(display->drm->dev);
i915_reg_t vga_reg = intel_vga_cntrl_reg(display);
enum pipe pipe;
u32 tmp;
u8 sr1;
if (intel_de_read(display, vga_reg) & VGA_DISP_DISABLE)
tmp = intel_de_read(display, vga_reg);
if (tmp & VGA_DISP_DISABLE)
return;
if (display->platform.cherryview)
pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK_CHV, tmp);
else if (has_vga_pipe_sel(display))
pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK, tmp);
else
pipe = PIPE_A;
drm_dbg_kms(display->drm, "Disabling VGA plane on pipe %c\n",
pipe_name(pipe));
/* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
outb(0x01, VGA_SEQ_I);