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drivers/firmware: add SDEI cross-CPU NMI service for arm64
Deliver an NMI-like event to an interrupt-masked arm64 CPU via the standard SDEI software-signalled event (event 0), without the pseudo-NMI hot-path cost: register a handler for event 0 and poke a target with sdei_event_signal(0, mpidr). First user is arch_trigger_cpumask_backtrace() (sysrq-l, RCU stalls, hung-task/soft-lockup dumps), which otherwise rides an IPI that can't reach a masked CPU. Falls back to the IPI path when SDEI is absent; no watchdog backend yet, so the stock detector is untouched. Signed-off-by: Kiryl Shutsemau (Meta) <kas@kernel.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Yin Fengwei <fengwei_yin@linux.alibaba.com> Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
committed by
Will Deacon
parent
9141eda9ee
commit
0c2c56598c
@@ -25093,7 +25093,7 @@ M: James Morse <james.morse@arm.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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F: Documentation/devicetree/bindings/arm/firmware/sdei.txt
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F: drivers/firmware/arm_sdei.c
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F: drivers/firmware/arm_sdei*
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F: include/linux/arm_sdei.h
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F: include/uapi/linux/arm_sdei.h
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24
arch/arm64/include/asm/nmi.h
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24
arch/arm64/include/asm/nmi.h
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@@ -0,0 +1,24 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_NMI_H
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#define __ASM_NMI_H
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#include <linux/cpumask.h>
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/*
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* Cross-CPU NMI provider hooks, consulted by the arm64 arch code before
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* its regular-IRQ / pseudo-NMI IPI paths. The SDEI provider in
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* drivers/firmware/arm_sdei_nmi.c implements them when active; a future
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* FEAT_NMI provider could slot in here too. The stubs let callers stay
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* unconditional when ARM_SDEI_NMI is off.
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*/
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#ifdef CONFIG_ARM_SDEI_NMI
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bool sdei_nmi_trigger_cpumask_backtrace(const cpumask_t *mask, int exclude_cpu);
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#else
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static inline bool sdei_nmi_trigger_cpumask_backtrace(const cpumask_t *mask,
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int exclude_cpu)
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{
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return false;
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}
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#endif
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#endif /* __ASM_NMI_H */
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@@ -45,6 +45,7 @@
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#include <asm/daifflags.h>
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#include <asm/kvm_mmu.h>
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#include <asm/mmu_context.h>
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#include <asm/nmi.h>
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#include <asm/numa.h>
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#include <asm/processor.h>
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#include <asm/smp_plat.h>
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@@ -932,6 +933,16 @@ static void arm64_backtrace_ipi(cpumask_t *mask)
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void arch_trigger_cpumask_backtrace(const cpumask_t *mask, int exclude_cpu)
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{
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/*
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* Prefer the SDEI cross-CPU NMI provider when active: firmware
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* dispatches the event out of EL3 and reaches CPUs that have
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* interrupts locally masked, without the per-IRQ-mask cost that
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* pseudo-NMI pays for the same reach. The plain IPI path below
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* can't reach such a CPU unless pseudo-NMI is enabled.
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*/
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if (sdei_nmi_trigger_cpumask_backtrace(mask, exclude_cpu))
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return;
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/*
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* NOTE: though nmi_trigger_cpumask_backtrace() has "nmi_" in the name,
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* nothing about it truly needs to be implemented using an NMI, it's
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@@ -36,6 +36,25 @@ config ARM_SDE_INTERFACE
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standard for registering callbacks from the platform firmware
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into the OS. This is typically used to implement RAS notifications.
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config ARM_SDEI_NMI
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bool "SDEI-based cross-CPU NMI service (arm64)"
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depends on ARM_SDE_INTERFACE
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help
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Provides SDEI-based cross-CPU NMI delivery for hooks that need
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to reach interrupt-masked CPUs on silicon that lacks FEAT_NMI:
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- arch_trigger_cpumask_backtrace() (sysrq-l, RCU stalls,
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hardlockup_all_cpu_backtrace, soft-lockup secondary dumps,
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hung-task auxiliary dumps)
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The driver registers a handler for the SDEI software-signalled
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event (event 0) and reaches a target CPU by signalling it with
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SDEI_EVENT_SIGNAL. Firmware delivers the event out of EL3
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regardless of the target's PSTATE.DAIF -- forced delivery into a
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CPU wedged with interrupts locally masked.
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If unsure, say N.
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config EDD
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tristate "BIOS Enhanced Disk Drive calls determine boot disk"
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depends on X86
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@@ -4,6 +4,7 @@
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#
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obj-$(CONFIG_ARM_SCPI_PROTOCOL) += arm_scpi.o
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obj-$(CONFIG_ARM_SDE_INTERFACE) += arm_sdei.o
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obj-$(CONFIG_ARM_SDEI_NMI) += arm_sdei_nmi.o
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obj-$(CONFIG_DMI) += dmi_scan.o
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obj-$(CONFIG_DMI_SYSFS) += dmi-sysfs.o
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obj-$(CONFIG_EDD) += edd.o
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159
drivers/firmware/arm_sdei_nmi.c
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159
drivers/firmware/arm_sdei_nmi.c
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@@ -0,0 +1,159 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* arm64 SDEI-based cross-CPU NMI service.
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*
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* Delivering an "NMI-shaped" event to an EL1 context that has locally
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* masked interrupts, on silicon without FEAT_NMI, can be done two ways:
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*
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* - pseudo-NMI: mask "interrupts" via the GIC priority register
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* (ICC_PMR_EL1) instead of PSTATE.DAIF, leaving a high-priority band
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* deliverable. Functionally this works -- but it reimplements every
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* local_irq_disable()/enable() and exception entry/exit as a PMR
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* write plus synchronisation, a cost paid on that hot path forever,
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* whether or not an NMI is ever delivered.
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*
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* - SDEI: leave interrupt masking as the cheap PSTATE.DAIF operation
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* and have the firmware bounce an EL3-routed Group-0 SGI back to
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* NS-EL1 as an event callback. The cost is a firmware round-trip,
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* but only at the rare moment delivery is actually needed.
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*
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* This driver takes the second path: it keeps the IRQ-mask hot path
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* free and pays only when it fires, which is what makes cross-CPU NMI
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* affordable on hardware where the pseudo-NMI tax isn't, until FEAT_NMI
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* makes NMI masking cheap in the architecture itself.
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*
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* Capabilities provided:
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*
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* - sdei_nmi_trigger_cpumask_backtrace() — override for arm64's
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* arch_trigger_cpumask_backtrace(), so sysrq-l, RCU stall dumps,
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* hardlockup_all_cpu_backtrace, soft-lockup/hung-task secondary
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* dumps all reach interrupt-masked CPUs.
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*
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* Delivery uses the standard SDEI software-signalled event (event 0) and
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* SDEI_EVENT_SIGNAL. We register a handler for event 0, enable it, and
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* poke a target CPU with sdei_event_signal(0, mpidr): firmware makes
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* event 0 pending on that PE and dispatches the handler NMI-like,
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* regardless of the target's DAIF.
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* Availability is simply whether event 0 registers and enables -- if SDEI
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* and its software-signalled event are present we use it, otherwise the
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* driver stays inert.
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*/
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#define pr_fmt(fmt) "sdei_nmi: " fmt
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#include <linux/arm_sdei.h>
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#include <linux/cpumask.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/kprobes.h>
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#include <linux/nmi.h>
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#include <linux/printk.h>
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#include <linux/ptrace.h>
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#include <linux/smp.h>
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#include <linux/types.h>
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#include <asm/nmi.h>
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#include <asm/smp_plat.h>
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static bool sdei_nmi_available;
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#define SDEI_NMI_EVENT 0
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static int sdei_nmi_handler(u32 event, struct pt_regs *regs, void *arg)
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{
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/*
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* nmi_cpu_backtrace() no-ops unless this CPU's bit is set in the
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* global backtrace mask (driven by nmi_trigger_cpumask_backtrace()),
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* so a fire that reaches a CPU not being backtraced is harmless.
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*/
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nmi_cpu_backtrace(regs);
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return SDEI_EV_HANDLED;
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}
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NOKPROBE_SYMBOL(sdei_nmi_handler);
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static void sdei_nmi_fire(unsigned int target_cpu)
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{
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int err = sdei_event_signal(SDEI_NMI_EVENT, cpu_logical_map(target_cpu));
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if (err)
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pr_warn("SDEI_EVENT_SIGNAL to CPU %u failed: %d\n",
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target_cpu, err);
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}
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/*
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* Raise callback for nmi_trigger_cpumask_backtrace(): signal event 0
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* at every CPU still pending in @mask. The framework excludes the local
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* CPU from @mask before calling us.
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*/
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static void sdei_nmi_raise_backtrace(cpumask_t *mask)
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{
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unsigned int cpu;
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/*
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* Publish backtrace_mask (set by nmi_trigger_cpumask_backtrace())
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* before signalling. As in the stop path, the SMC is not a memory
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* store, so dsb(ishst) is needed for the target to observe the mask.
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*/
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dsb(ishst);
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for_each_cpu(cpu, mask)
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sdei_nmi_fire(cpu);
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}
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/*
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* Override hook for arch_trigger_cpumask_backtrace() (see
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* arch/arm64/kernel/smp.c). Returns true when SDEI handled the request,
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* which is the case whenever SDEI is active; on a false return the arch
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* falls back to its regular-IRQ (or pseudo-NMI, if enabled) IPI.
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*
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* On a kernel built without paying the pseudo-NMI hot-path cost (the
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* usual case for this driver's target), the IPI can't reach a CPU that
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* has interrupts masked -- so the backtrace of the one CPU you care
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* about comes back empty. SDEI is dispatched out of EL3 and lands
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* regardless of the target's DAIF, without taxing the IRQ-mask path.
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*/
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bool sdei_nmi_trigger_cpumask_backtrace(const cpumask_t *mask, int exclude_cpu)
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{
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if (!sdei_nmi_available)
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return false;
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nmi_trigger_cpumask_backtrace(mask, exclude_cpu,
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sdei_nmi_raise_backtrace);
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return true;
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}
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/*
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* device_initcall (after arch_initcall(sdei_init), so the SDEI subsystem
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* is up): probe the firmware, register the event, and turn on the
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* cross-CPU service. If the probe fails the driver stays inert and the
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* override hooks decline, leaving the arch's own paths in place.
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*/
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static int __init sdei_nmi_init(void)
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{
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int err;
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if (!sdei_is_present())
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return 0;
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err = sdei_event_register(SDEI_NMI_EVENT, sdei_nmi_handler, NULL);
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if (err) {
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pr_err("sdei_event_register(%u) failed: %d\n",
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SDEI_NMI_EVENT, err);
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return 0;
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}
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err = sdei_event_enable(SDEI_NMI_EVENT);
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if (err) {
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pr_err("sdei_event_enable(%u) failed: %d\n",
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SDEI_NMI_EVENT, err);
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sdei_event_unregister(SDEI_NMI_EVENT);
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return 0;
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}
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sdei_nmi_available = true;
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pr_info("using SDEI cross-CPU NMI (SDEI_EVENT_SIGNAL, event %u)\n",
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SDEI_NMI_EVENT);
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return 0;
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}
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device_initcall(sdei_nmi_init);
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