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Merge branch 'net-stmmac-remove-mac_interface'

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Russell King says:

====================
net: stmmac: remove mac_interface

The dwmac core supports a range of interfaces, but when it comes to
SerDes interfaces, the core itself does not include the SerDes block.
Consequently, it has to provide an interface suitable to interface such
a block to, and uses TBI for this.

The driver also uses "PCS" for RGMII, even though the dwmac PCS block
is not present for this interface type - it was a convenice for the
code structure as RGMII includes inband signalling of the PHY state,
much like Cisco SGMII does at a high level.

As such, the code refers to RGMII and SGMII modes for the PCS, and
there used to be STMMAC_PCS_TBI and STMMAC_PCS_RTBI constants as well
but these were never set, although they were used in the code.

The selection of the PCS mode was from mac_interface. Thus, it seems
that the original intention was for mac_interface to describe the
interface mode used within the dwmac core, and phy_interface to
describe the external world-accessible interface (e.g. which would
connect to a PHY or SFP cage.)

It appears that many glue drivers misinterpret these. A good exmple
is socfpga. This supports SGMII and 1000BASE-X, but does not include
the dwmac PCS, relying on the Lynx PCS instead. However, it makes use
of mac_interface to configure the dwmac core to its GMII/MII mode.

So, when operating in either of these modes, the dwmac is configured
for GMII mode to communicate with the Lynx PCS which then provides
the SGMII or 1000BASE-X interface mode to the external world.

Given that phy_interface is the external world interface, and
mac_interface is the dwmac core interface, selecting the interface
mode based on mac_interface being 1000BASEX makes no sense.

Moreover, mac_interface is initialised by the stmmac core code. If
the "mac-mode" property is set in DT, this will be used. Otherwise,
it will reflect the "phy-mode" property - meaning that it defaults
to phy_interface. As no in-kernel DT makes reference to a "mac-mode"
property, we can assume that for all in-kernel platforms, these two
interface variables are the same. The exception are those platform
glues which I reviwed and suggested they use phy_interface, setting
mac_interface to PHY_INTERFACE_MODE_NA.

The conclusion to all of this is that mac_interface serves no useful
purpose, and causes confusion as the platform glue code doesn't seem
to know which one should be used.

Thus, let's get rid of mac_interface, which makes all this code more
understandable. It also helps to untangle some of the questions such
as:
- should this be using the interface passed from phylink
- should we set the range of phylink supported interfaces to be
  more than one
- when we get phylink PCS support for the dwmac PCS, should we be
  selecting it based on mac_interface or phy_interface, and how
  should we populate the PCS' supported_interface bitmap.

Having converted socfpga to use phy_interface, this turns out to
feel like "the right way" to do this - convert the external world
"phy_interface" to whatever phy_intf_sel value that the dwmac core
needs to achieve the connection to whatever hardware blocks are
integrated inside the SoC to achieve the requested external world
interface.

As an illustration why - consider that in the case of socfpga, it
_could_ have been implemented such that the dwmac PCS was used for
SGMII, and the Lynx PCS for 1000BASE-X, or vice versa. Only the
platform glue would know which it is.

I will also note that several cores provide their currently configured
interface mode via the ACTPHYIF field of Hardware Feature 0, and thus
can be read back in the platform-independent parts of the driver to
decide whether the internal PCS or the RGMII (or actually SMII) "PCS"
should be used.

This is hot-off-the-press, and has only been build tested. As I have
none of these platforms, this series has not been run-tested, so
please test on your hardware.
====================

Link: https://patch.msgid.link/aMrPpc8oRxqGtVPJ@shell.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
2025-09-19 17:19:47 -07:00
parent 6a46e4faa8 6b0ed6a3a8
commit 0c2a4d304c
12 changed files with 82 additions and 67 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
View File

@@ -72,7 +72,7 @@ static int imx8mp_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
struct imx_priv_data *dwmac = plat_dat->bsp_priv;
int val;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
val = GPR_ENET_QOS_INTF_SEL_MII;
break;
@@ -88,8 +88,8 @@ static int imx8mp_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
GPR_ENET_QOS_RGMII_EN;
break;
default:
pr_debug("imx dwmac doesn't support %d interface\n",
plat_dat->mac_interface);
pr_debug("imx dwmac doesn't support %s interface\n",
phy_modes(plat_dat->phy_interface));
return -EINVAL;
}
@@ -112,7 +112,7 @@ static int imx93_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
struct imx_priv_data *dwmac = plat_dat->bsp_priv;
int val, ret;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
val = MX93_GPR_ENET_QOS_INTF_SEL_MII;
break;
@@ -134,8 +134,8 @@ static int imx93_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
val = MX93_GPR_ENET_QOS_INTF_SEL_RGMII;
break;
default:
dev_dbg(dwmac->dev, "imx dwmac doesn't support %d interface\n",
plat_dat->mac_interface);
dev_dbg(dwmac->dev, "imx dwmac doesn't support %s interface\n",
phy_modes(plat_dat->phy_interface));
return -EINVAL;
}
@@ -197,7 +197,7 @@ static int imx_dwmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,
{
struct imx_priv_data *dwmac = bsp_priv;
interface = dwmac->plat_dat->mac_interface;
interface = dwmac->plat_dat->phy_interface;
if (interface == PHY_INTERFACE_MODE_RMII ||
interface == PHY_INTERFACE_MODE_MII)
return 0;
@@ -215,8 +215,8 @@ static void imx_dwmac_fix_speed(void *priv, int speed, unsigned int mode)
plat_dat = dwmac->plat_dat;
if (dwmac->ops->mac_rgmii_txclk_auto_adj ||
(plat_dat->mac_interface == PHY_INTERFACE_MODE_RMII) ||
(plat_dat->mac_interface == PHY_INTERFACE_MODE_MII))
(plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII) ||
(plat_dat->phy_interface == PHY_INTERFACE_MODE_MII))
return;
rate = rgmii_clock(speed);
@@ -274,7 +274,7 @@ static int imx_dwmac_mx93_reset(struct stmmac_priv *priv, void __iomem *ioaddr)
value |= DMA_BUS_MODE_SFT_RESET;
writel(value, ioaddr + DMA_BUS_MODE);
if (plat_dat->mac_interface == PHY_INTERFACE_MODE_RMII) {
if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII) {
usleep_range(100, 200);
writel(RMII_RESET_SPEED, ioaddr + MAC_CTRL_REG);
}

25
drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c
View File

@@ -90,7 +90,7 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
struct ingenic_mac *mac = plat_dat->bsp_priv;
unsigned int val;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) |
FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_MII);
@@ -119,7 +119,8 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
break;
default:
dev_err(mac->dev, "Unsupported interface %d", plat_dat->mac_interface);
dev_err(mac->dev, "Unsupported interface %s\n",
phy_modes(plat_dat->phy_interface));
return -EINVAL;
}
@@ -131,13 +132,14 @@ static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
{
struct ingenic_mac *mac = plat_dat->bsp_priv;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_RMII:
dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
break;
default:
dev_err(mac->dev, "Unsupported interface %d", plat_dat->mac_interface);
dev_err(mac->dev, "Unsupported interface %s\n",
phy_modes(plat_dat->phy_interface));
return -EINVAL;
}
@@ -150,14 +152,15 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
struct ingenic_mac *mac = plat_dat->bsp_priv;
unsigned int val;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_RMII:
val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII);
dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
break;
default:
dev_err(mac->dev, "Unsupported interface %d", plat_dat->mac_interface);
dev_err(mac->dev, "Unsupported interface %s\n",
phy_modes(plat_dat->phy_interface));
return -EINVAL;
}
@@ -170,7 +173,7 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
struct ingenic_mac *mac = plat_dat->bsp_priv;
unsigned int val;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_RMII:
val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) |
FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII);
@@ -178,7 +181,8 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
break;
default:
dev_err(mac->dev, "Unsupported interface %d", plat_dat->mac_interface);
dev_err(mac->dev, "Unsupported interface %s\n",
phy_modes(plat_dat->phy_interface));
return -EINVAL;
}
@@ -191,7 +195,7 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
struct ingenic_mac *mac = plat_dat->bsp_priv;
unsigned int val;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_RMII:
val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) |
FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN) |
@@ -221,7 +225,8 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
break;
default:
dev_err(mac->dev, "Unsupported interface %d", plat_dat->mac_interface);
dev_err(mac->dev, "Unsupported interface %s\n",
phy_modes(plat_dat->phy_interface));
return -EINVAL;
}

2
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
View File

@@ -98,8 +98,6 @@ static void loongson_default_data(struct pci_dev *pdev,
/* Set default value for multicast hash bins */
plat->multicast_filter_bins = 256;
plat->mac_interface = PHY_INTERFACE_MODE_NA;
/* Set default value for unicast filter entries */
plat->unicast_filter_entries = 1;

1
drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c
View File

@@ -41,7 +41,6 @@ static int lpc18xx_dwmac_probe(struct platform_device *pdev)
if (IS_ERR(plat_dat))
return PTR_ERR(plat_dat);
plat_dat->mac_interface = PHY_INTERFACE_MODE_NA;
plat_dat->has_gmac = true;
reg = syscon_regmap_lookup_by_compatible("nxp,lpc1850-creg");

2
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
View File

@@ -234,7 +234,7 @@ static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *
static int socfpga_get_plat_phymode(struct socfpga_dwmac *dwmac)
{
return dwmac->plat_dat->mac_interface;
return dwmac->plat_dat->phy_interface;
}
static void socfpga_sgmii_config(struct socfpga_dwmac *dwmac, bool enable)

6
drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
View File

@@ -38,7 +38,7 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
unsigned int mode;
int err;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_RMII:
mode = STARFIVE_DWMAC_PHY_INFT_RMII;
break;
@@ -51,8 +51,8 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
break;
default:
dev_err(dwmac->dev, "unsupported interface %d\n",
plat_dat->mac_interface);
dev_err(dwmac->dev, "unsupported interface %s\n",
phy_modes(plat_dat->phy_interface));
return -EINVAL;
}

26
drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
View File

@@ -171,7 +171,7 @@ static int stm32mp1_select_ethck_external(struct plat_stmmacenet_data *plat_dat)
{
struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
dwmac->enable_eth_ck = dwmac->ext_phyclk;
return 0;
@@ -193,7 +193,7 @@ static int stm32mp1_select_ethck_external(struct plat_stmmacenet_data *plat_dat)
default:
dwmac->enable_eth_ck = false;
dev_err(dwmac->dev, "Mode %s not supported",
phy_modes(plat_dat->mac_interface));
phy_modes(plat_dat->phy_interface));
return -EINVAL;
}
}
@@ -206,7 +206,7 @@ static int stm32mp1_validate_ethck_rate(struct plat_stmmacenet_data *plat_dat)
if (!dwmac->enable_eth_ck)
return 0;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_GMII:
if (clk_rate == ETH_CK_F_25M)
@@ -228,7 +228,7 @@ static int stm32mp1_validate_ethck_rate(struct plat_stmmacenet_data *plat_dat)
}
dev_err(dwmac->dev, "Mode %s does not match eth-ck frequency %d Hz",
phy_modes(plat_dat->mac_interface), clk_rate);
phy_modes(plat_dat->phy_interface), clk_rate);
return -EINVAL;
}
@@ -238,7 +238,7 @@ static int stm32mp1_configure_pmcr(struct plat_stmmacenet_data *plat_dat)
u32 reg = dwmac->mode_reg;
int val = 0;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
/*
* STM32MP15xx supports both MII and GMII, STM32MP13xx MII only.
@@ -269,12 +269,12 @@ static int stm32mp1_configure_pmcr(struct plat_stmmacenet_data *plat_dat)
break;
default:
dev_err(dwmac->dev, "Mode %s not supported",
phy_modes(plat_dat->mac_interface));
phy_modes(plat_dat->phy_interface));
/* Do not manage others interfaces */
return -EINVAL;
}
dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->mac_interface));
dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->phy_interface));
/* Shift value at correct ethernet MAC offset in SYSCFG_PMCSETR */
val <<= ffs(dwmac->mode_mask) - ffs(SYSCFG_MP1_ETH_MASK);
@@ -294,7 +294,7 @@ static int stm32mp2_configure_syscfg(struct plat_stmmacenet_data *plat_dat)
u32 reg = dwmac->mode_reg;
int val = 0;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
/* ETH_REF_CLK_SEL bit in SYSCFG register is not applicable in MII mode */
break;
@@ -319,12 +319,12 @@ static int stm32mp2_configure_syscfg(struct plat_stmmacenet_data *plat_dat)
break;
default:
dev_err(dwmac->dev, "Mode %s not supported",
phy_modes(plat_dat->mac_interface));
phy_modes(plat_dat->phy_interface));
/* Do not manage others interfaces */
return -EINVAL;
}
dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->mac_interface));
dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->phy_interface));
/* Select PTP (IEEE1588) clock selection from RCC (ck_ker_ethxptp) */
val |= SYSCFG_ETHCR_ETH_PTP_CLK_SEL;
@@ -359,7 +359,7 @@ static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat)
u32 reg = dwmac->mode_reg;
int val;
switch (plat_dat->mac_interface) {
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
val = SYSCFG_MCU_ETH_SEL_MII;
break;
@@ -368,12 +368,12 @@ static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat)
break;
default:
dev_err(dwmac->dev, "Mode %s not supported",
phy_modes(plat_dat->mac_interface));
phy_modes(plat_dat->phy_interface));
/* Do not manage others interfaces */
return -EINVAL;
}
dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->mac_interface));
dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->phy_interface));
return regmap_update_bits(dwmac->regmap, reg,
SYSCFG_MCU_ETH_MASK, val << 23);

4
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
View File

@@ -974,7 +974,7 @@ static int sun8i_dwmac_set_syscon(struct device *dev,
}
}
switch (plat->mac_interface) {
switch (plat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
/* default */
break;
@@ -989,7 +989,7 @@ static int sun8i_dwmac_set_syscon(struct device *dev,
break;
default:
dev_err(dev, "Unsupported interface mode: %s",
phy_modes(plat->mac_interface));
phy_modes(plat->phy_interface));
return -EINVAL;
}

24
drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c
View File

@@ -56,7 +56,7 @@ static int thead_dwmac_set_phy_if(struct plat_stmmacenet_data *plat)
struct thead_dwmac *dwmac = plat->bsp_priv;
u32 phyif;
switch (plat->mac_interface) {
switch (plat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
phyif = PHY_INTF_MII_GMII;
break;
@@ -67,8 +67,8 @@ static int thead_dwmac_set_phy_if(struct plat_stmmacenet_data *plat)
phyif = PHY_INTF_RGMII;
break;
default:
dev_err(dwmac->dev, "unsupported phy interface %d\n",
plat->mac_interface);
dev_err(dwmac->dev, "unsupported phy interface %s\n",
phy_modes(plat->phy_interface));
return -EINVAL;
}
@@ -81,7 +81,7 @@ static int thead_dwmac_set_txclk_dir(struct plat_stmmacenet_data *plat)
struct thead_dwmac *dwmac = plat->bsp_priv;
u32 txclk_dir;
switch (plat->mac_interface) {
switch (plat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
txclk_dir = TXCLK_DIR_INPUT;
break;
@@ -92,8 +92,8 @@ static int thead_dwmac_set_txclk_dir(struct plat_stmmacenet_data *plat)
txclk_dir = TXCLK_DIR_OUTPUT;
break;
default:
dev_err(dwmac->dev, "unsupported phy interface %d\n",
plat->mac_interface);
dev_err(dwmac->dev, "unsupported phy interface %s\n",
phy_modes(plat->phy_interface));
return -EINVAL;
}
@@ -112,7 +112,7 @@ static int thead_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,
plat = dwmac->plat;
switch (plat->mac_interface) {
switch (plat->phy_interface) {
/* For MII, rxc/txc is provided by phy */
case PHY_INTERFACE_MODE_MII:
return 0;
@@ -143,8 +143,8 @@ static int thead_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,
return 0;
default:
dev_err(dwmac->dev, "unsupported phy interface %d\n",
plat->mac_interface);
dev_err(dwmac->dev, "unsupported phy interface %s\n",
phy_modes(plat->phy_interface));
return -EINVAL;
}
}
@@ -154,7 +154,7 @@ static int thead_dwmac_enable_clk(struct plat_stmmacenet_data *plat)
struct thead_dwmac *dwmac = plat->bsp_priv;
u32 reg, div;
switch (plat->mac_interface) {
switch (plat->phy_interface) {
case PHY_INTERFACE_MODE_MII:
reg = GMAC_RX_CLK_EN | GMAC_TX_CLK_EN;
break;
@@ -177,8 +177,8 @@ static int thead_dwmac_enable_clk(struct plat_stmmacenet_data *plat)
break;
default:
dev_err(dwmac->dev, "unsupported phy interface %d\n",
plat->mac_interface);
dev_err(dwmac->dev, "unsupported phy interface %s\n",
phy_modes(plat->phy_interface));
return -EINVAL;
}

2
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
View File

@@ -1118,7 +1118,7 @@ static const struct phylink_mac_ops stmmac_phylink_mac_ops = {
*/
static void stmmac_check_pcs_mode(struct stmmac_priv *priv)
{
int interface = priv->plat->mac_interface;
int interface = priv->plat->phy_interface;
if (priv->dma_cap.pcs) {
if ((interface == PHY_INTERFACE_MODE_RGMII) ||

6
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
View File

@@ -453,8 +453,12 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
return ERR_PTR(phy_mode);
plat->phy_interface = phy_mode;
rc = stmmac_of_get_mac_mode(np);
plat->mac_interface = rc < 0 ? plat->phy_interface : rc;
if (rc >= 0 && rc != phy_mode)
dev_warn(&pdev->dev,
"\"mac-mode\" property used for %s but differs to \"phy-mode\" of %s, and will be ignored. Please report.\n",
phy_modes(rc), phy_modes(phy_mode));
/* Some wrapper drivers still rely on phy_node. Let's save it while
* they are not converted to phylink. */

31
include/linux/stmmac.h
View File

@@ -190,18 +190,27 @@ struct plat_stmmacenet_data {
int bus_id;
int phy_addr;
/* MAC ----- optional PCS ----- SerDes ----- optional PHY ----- Media
* ^ ^
* mac_interface phy_interface
* ^
* phy_interface
*
* mac_interface is the MAC-side interface, which may be the same
* as phy_interface if there is no intervening PCS. If there is a
* PCS, then mac_interface describes the interface mode between the
* MAC and PCS, and phy_interface describes the interface mode
* between the PCS and PHY.
*/
phy_interface_t mac_interface;
/* phy_interface is the PHY-side interface - the interface used by
* an attached PHY.
* The Synopsys dwmac core only covers the MAC and an optional
* integrated PCS. Where the integrated PCS is used with a SerDes,
* e.g. for 1000base-X or Cisco SGMII, the connection between the
* PCS and SerDes will be TBI.
*
* Where the Synopsys dwmac core has been instantiated with multiple
* interface modes, these are selected via core-external configuration
* which is sampled when the dwmac core is reset. How this is done is
* platform glue specific, but this defines the interface used from
* the Synopsys dwmac core to the rest of the SoC.
*
* Where PCS other than the optional integrated Synopsys dwmac PCS
* is used, this counts as "the rest of the SoC" in the above
* paragraph.
*
* phy_interface is the PHY-side interface - the interface used by
* an attached PHY or SFP etc. This is equivalent to the interface
* that phylink uses.
*/
phy_interface_t phy_interface;
struct stmmac_mdio_bus_data *mdio_bus_data;