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drm/mediatek: fix the rate and divder of hdmi phy for MT2701

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Due to a clerical error,there is one zero less for 12800000.
Fix it for 128000000
Fixes: 0fc721b296 ("drm/mediatek: add hdmi driver for MT2701 and MT7623")

Signed-off-by: Wangyan Wang <wangyan.wang@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
This commit is contained in:
Wangyan Wang
2019-04-09 14:53:04 +08:00
committed by CK Hu
parent 2ae2c3316f
commit 0c24613cda
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
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@@ -116,8 +116,8 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
if (rate <= 64000000)
pos_div = 3;
else if (rate <= 12800000)
pos_div = 1;
else if (rate <= 128000000)
pos_div = 2;
else
pos_div = 1;