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Merge tag 'riscv-dt-for-v7.3-early-k230' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

Browse Source 
RISC-V devicetrees for v7.3 - early k230 material

Canaan:
Support for the k230 SoC that was too late for the 7.2 window.
Consists of some bindings not taken by the various subsystem
maintainers, the original dts patches from Yangyu back in 2024
and the more recent clock, reset and pinctrl additions from various
contributors.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v7.3-early-k230' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: canaan: Add clock definition for K230
  riscv: dts: canaan: add reset controller for K230
  riscv: dts: canaan: k230: Add "b" ISA extension
  riscv: dts: canaan: Add k230's pinctrl node
  riscv: dts: canaan: Correct the formatting issues about k230 dts
  riscv: dts: add initial canmv-k230 and k230-evb dts
  dt-bindings: interrupt-controller: Add Canaan K230 PLIC
  dt-bindings: timer: Add Canaan K230 CLINT
  dt-bindings: add Canaan K230 boards compatible strings

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2026-07-24 18:28:35 +02:00
parent 8a78168e98 82ab962ef6
commit 0bcfbb1f78
8 changed files with 578 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
View File

@@ -71,6 +71,7 @@ properties:
- items:
- enum:
- allwinner,sun20i-d1-plic
- canaan,k230-plic
- sophgo,cv1800b-plic
- sophgo,cv1812h-plic
- sophgo,sg2000-plic

8
Documentation/devicetree/bindings/riscv/canaan.yaml
View File

@@ -10,7 +10,7 @@ maintainers:
- Damien Le Moal <dlemoal@kernel.org>
description:
Canaan Kendryte K210 SoC-based boards
Canaan Kendryte SoC-based boards
properties:
$nodename:
@@ -42,6 +42,12 @@ properties:
- items:
- const: canaan,kendryte-k210
- items:
- enum:
- canaan,canmv-k230
- canaan,k230-usip-lp3-evb
- const: canaan,kendryte-k230
additionalProperties: true
...

1
Documentation/devicetree/bindings/timer/sifive,clint.yaml
View File

@@ -50,6 +50,7 @@ properties:
- items:
- enum:
- allwinner,sun20i-d1-clint
- canaan,k230-clint
- sophgo,cv1800b-clint
- sophgo,cv1812h-clint
- sophgo,sg2000-clint

2
arch/riscv/boot/dts/canaan/Makefile
View File

@@ -1,6 +1,8 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_CANAAN) += canaan_kd233.dtb
dtb-$(CONFIG_ARCH_CANAAN) += k210_generic.dtb
dtb-$(CONFIG_ARCH_CANAAN) += k230-canmv.dtb
dtb-$(CONFIG_ARCH_CANAAN) += k230-evb.dtb
dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_bit.dtb
dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_dock.dtb
dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_go.dtb

343
arch/riscv/boot/dts/canaan/k230-canmv.dts Normal file
View File

@@ -0,0 +1,343 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name>
*/
#include "k230.dtsi"
/ {
model = "Canaan CanMV-K230";
compatible = "canaan,canmv-k230", "canaan,kendryte-k230";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
ddr: memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x20000000>;
};
timerx_pulse_in: clock-50000000 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
};
&uart0 {
status = "okay";
};
&pinctrl {
jtag_pins: jtag-pins {
jtag-tck-cfg {
pinmux = <K230_PINMUX(2, 1)>;
slew-rate = <0>;
drive-strength = <4>;
power-source = <K230_MSC_1V8>;
input-enable;
bias-pull-down;
input-schmitt-enable;
};
jtag-tdi-cfg {
pinmux = <K230_PINMUX(3, 1)>;
slew-rate = <0>;
drive-strength = <4>;
power-source = <K230_MSC_1V8>;
input-enable;
bias-disable;
};
jtag-tdo-cfg {
pinmux = <K230_PINMUX(4, 1)>;
slew-rate = <0>;
drive-strength = <4>;
power-source = <K230_MSC_1V8>;
output-enable;
bias-disable;
};
jtag-tms-cfg {
pinmux = <K230_PINMUX(5, 1)>;
slew-rate = <0>;
drive-strength = <4>;
power-source = <K230_MSC_1V8>;
input-enable;
bias-pull-up;
};
};
uart2_pins: uart2-pins {
uart2-pins-cfg {
pinmux = <K230_PINMUX(5, 3)>, /* uart2 txd */
<K230_PINMUX(6, 3)>; /* uart2 rxd */
slew-rate = <0>;
drive-strength = <4>;
power-source = <K230_MSC_1V8>;
input-enable;
output-enable;
bias-disable;
};
};
pwm2_pins: pwm2-pins {
pwm2-pin-cfg {
pinmux = <K230_PINMUX(7, 1)>;
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_1V8>;
input-enable;
output-enable;
bias-disable;
input-schmitt-enable;
};
};
pwm3_pins: pwm3-pins {
pwm3-pin-cfg {
pinmux = <K230_PINMUX(8, 1)>;
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_1V8>;
input-enable;
output-enable;
bias-disable;
input-schmitt-enable;
};
};
pwm4_pins: pwm4-pins {
pwm4-pin-cfg {
pinmux = <K230_PINMUX(9, 1)>;
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_1V8>;
input-enable;
output-enable;
bias-disable;
input-schmitt-enable;
};
};
iis_pins: iis-pins {
iis-clk-cfg {
pinmux = <K230_PINMUX(32, 2)>;
slew-rate = <0>;
drive-strength = <4>;
power-source = <K230_MSC_1V8>;
output-enable;
bias-disable;
};
iis-ws-cfg {
pinmux = <K230_PINMUX(33, 2)>;
slew-rate = <0>;
drive-strength = <4>;
power-source = <K230_MSC_1V8>;
output-enable;
bias-disable;
};
iis-din0-cfg {
pinmux = <K230_PINMUX(34, 2)>;
slew-rate = <0>;
drive-strength = <4>;
power-source = <K230_MSC_1V8>;
input-enable;
bias-disable;
};
iis-dout0-cfg {
pinmux = <K230_PINMUX(35, 2)>;
slew-rate = <0>;
drive-strength = <4>;
power-source = <K230_MSC_1V8>;
output-enable;
bias-disable;
};
};
uart4_pins: uart4-pins {
uart4-txd-cfg {
pinmux = <K230_PINMUX(36, 4)>;
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_1V8>;
output-enable;
bias-disable;
input-schmitt-enable;
};
uart4-rxd-cfg {
pinmux = <K230_PINMUX(37, 4)>;
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_1V8>;
input-enable;
bias-disable;
input-schmitt-enable;
};
};
uart0_pins: uart0-pins {
uart0-txd-cfg {
pinmux = <K230_PINMUX(38, 1)>;
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_1V8>;
output-enable;
bias-disable;
input-schmitt-enable;
};
uart0-rxd-cfg {
pinmux = <K230_PINMUX(39, 1)>;
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_1V8>;
input-enable;
bias-disable;
input-schmitt-enable;
};
};
iic1_pins: iic1-pins {
iic1-pins-cfg {
pinmux = <K230_PINMUX(40, 2)>, /* iic1 scl */
<K230_PINMUX(41, 2)>; /* iic1 sda */
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_1V8>;
input-enable;
output-enable;
bias-pull-up;
input-schmitt-enable;
};
};
iic3_pins: iic3-pins {
iic3-pins-cfg {
pinmux = <K230_PINMUX(44, 2)>, /* iic3 scl */
<K230_PINMUX(45, 2)>; /* iic3 sda */
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_1V8>;
input-enable;
output-enable;
bias-pull-up;
input-schmitt-enable;
};
};
iic4_pins: iic4-pins {
iic4-pins-cfg {
pinmux = <K230_PINMUX(46, 3)>, /* iic4 scl */
<K230_PINMUX(47, 3)>; /* iic4 sda */
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_1V8>;
input-enable;
output-enable;
bias-pull-up;
input-schmitt-enable;
};
};
iic0_pins: iic0-pins {
iic0-pins-cfg {
pinmux = <K230_PINMUX(48, 3)>, /* iic0 scl */
<K230_PINMUX(49, 3)>; /* iic0 sda */
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_1V8>;
input-enable;
output-enable;
bias-pull-up;
input-schmitt-enable;
};
};
uart3_pins: uart3-pins {
uart3-txd-cfg {
pinmux = <K230_PINMUX(50, 1)>;
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_3V3>;
output-enable;
bias-disable;
input-schmitt-enable;
};
uart3-rxd-cfg {
pinmux = <K230_PINMUX(51, 1)>;
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_3V3>;
input-enable;
bias-disable;
input-schmitt-enable;
};
};
key_pins: key-pins {
key-pins-cfg {
pinmux = <K230_PINMUX(52, 0)>, /* key0 */
<K230_PINMUX(53, 0)>; /* key1 */
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_3V3>;
input-enable;
output-enable;
bias-disable;
input-schmitt-enable;
};
};
mmc1_pins: mmc1-pins {
mmc1-cmd-cfg {
pinmux = <K230_PINMUX(54, 2)>;
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_3V3>;
input-enable;
output-enable;
bias-pull-up;
input-schmitt-enable;
};
mmc1-clk-cfg {
pinmux = <K230_PINMUX(55, 2)>;
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_3V3>;
output-enable;
bias-disable;
input-schmitt-enable;
};
mmc1-data-cfg {
pinmux = <K230_PINMUX(56, 2)>, /* mmc1 data0 */
<K230_PINMUX(57, 2)>, /* mmc1 data1 */
<K230_PINMUX(58, 2)>, /* mmc1 data2 */
<K230_PINMUX(59, 2)>; /* mmc1 data3 */
slew-rate = <0>;
drive-strength = <7>;
power-source = <K230_MSC_3V3>;
input-enable;
output-enable;
bias-pull-up;
input-schmitt-enable;
};
};
};
&sysclk {
clocks = <&osc24m>, <&timerx_pulse_in>;
clock-names = "osc24m", "timer-pulse-in";
};

39
arch/riscv/boot/dts/canaan/k230-evb.dts Normal file
View File

@@ -0,0 +1,39 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name>
*/
#include "k230.dtsi"
/ {
model = "Kendryte K230 EVB";
compatible = "canaan,k230-usip-lp3-evb", "canaan,kendryte-k230";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
ddr: memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x20000000>;
};
timerx_pulse_in: clock-50000000 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
};
&uart0 {
status = "okay";
};
&sysclk {
clocks = <&osc24m>, <&timerx_pulse_in>;
clock-names = "osc24m", "timer-pulse-in";
};

18
arch/riscv/boot/dts/canaan/k230-pinctrl.h Normal file
View File

@@ -0,0 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
/*
* Copyright (C) 2024 Canaan Bright Sight Co. Ltd
* Copyright (C) 2024 Ze Huang <18771902331@163.com>
*/
#ifndef _K230_PINCTRL_H
#define _K230_PINCTRL_H
#define K230_MSC_3V3 0
#define K230_MSC_1V8 1
#define BANK_VOLTAGE_DEFAULT K230_MSC_1V8
#define BANK_VOLTAGE_IO50_IO61 K230_MSC_3V3
#define K230_PINMUX(pin, mode) (((pin) << 8) | (mode))
#endif /* _K230_PINCTRL_H */

167
arch/riscv/boot/dts/canaan/k230.dtsi Normal file
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@@ -0,0 +1,167 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name>
*/
#include <dt-bindings/clock/canaan,k230-clk.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/reset/canaan,k230-rst.h>
#include "k230-pinctrl.h"
/dts-v1/;
/ {
#address-cells = <2>;
#size-cells = <2>;
compatible = "canaan,kendryte-k230";
cpus {
#address-cells = <1>;
#size-cells = <0>;
timebase-frequency = <27000000>;
cpu@0 {
compatible = "thead,c908", "riscv";
device_type = "cpu";
reg = <0>;
riscv,isa = "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicsr_zifencei_zihpm_zfh_zba_zbb_zbc_zbs_zvfh_svpbmt";
riscv,isa-base = "rv64i";
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "zicbom",
"zicbop", "zicboz", "zicntr", "zicsr", "zifencei",
"zihpm", "zfh", "zba", "zbb", "zbc", "zbs", "zvfh",
"svpbmt";
riscv,cbom-block-size = <64>;
riscv,cbop-block-size = <64>;
riscv,cboz-block-size = <64>;
d-cache-block-size = <64>;
d-cache-sets = <128>;
d-cache-size = <32768>;
i-cache-block-size = <64>;
i-cache-sets = <128>;
i-cache-size = <32768>;
next-level-cache = <&l2_cache>;
mmu-type = "riscv,sv39";
cpu0_intc: interrupt-controller {
compatible = "riscv,cpu-intc";
interrupt-controller;
#interrupt-cells = <1>;
};
};
l2_cache: l2-cache {
compatible = "cache";
cache-block-size = <64>;
cache-level = <2>;
cache-size = <262144>;
cache-sets = <256>;
cache-unified;
};
};
osc24m: clock-24000000 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "osc24m";
};
soc {
compatible = "simple-bus";
interrupt-parent = <&plic>;
#address-cells = <2>;
#size-cells = <2>;
dma-noncoherent;
ranges;
plic: interrupt-controller@f00000000 {
compatible = "canaan,k230-plic", "thead,c900-plic";
reg = <0xf 0x00000000 0x0 0x04000000>;
interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
riscv,ndev = <208>;
};
clint: timer@f04000000 {
compatible = "canaan,k230-clint", "thead,c900-clint";
reg = <0xf 0x04000000 0x0 0x00010000>;
interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
};
rst: reset-controller@91101000 {
compatible = "canaan,k230-rst";
reg = <0x0 0x91101000 0x0 0x1000>;
#reset-cells = <1>;
};
pinctrl: pinctrl@91105000 {
compatible = "canaan,k230-pinctrl";
reg = <0x0 0x91105000 0x0 0x100>;
};
sysclk: clock-controller@91102000 {
compatible = "canaan,k230-clk";
reg = <0x0 0x91102000 0x0 0x40>,
<0x0 0x91100000 0x0 0x108>;
clocks = <&osc24m>;
clock-names = "osc24m";
#clock-cells = <1>;
};
uart0: serial@91400000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x91400000 0x0 0x1000>;
clocks = <&sysclk K230_LS_UART0_RATE>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
resets = <&rst RST_UART0>;
status = "disabled";
};
uart1: serial@91401000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x91401000 0x0 0x1000>;
clocks = <&sysclk K230_LS_UART1_RATE>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
resets = <&rst RST_UART1>;
status = "disabled";
};
uart2: serial@91402000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x91402000 0x0 0x1000>;
clocks = <&sysclk K230_LS_UART2_RATE>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
resets = <&rst RST_UART2>;
status = "disabled";
};
uart3: serial@91403000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x91403000 0x0 0x1000>;
clocks = <&sysclk K230_LS_UART3_RATE>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
resets = <&rst RST_UART3>;
status = "disabled";
};
uart4: serial@91404000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x91404000 0x0 0x1000>;
clocks = <&sysclk K230_LS_UART4_RATE>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
resets = <&rst RST_UART4>;
status = "disabled";
};
};
};