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arm64: dts: qcom: x1e80100: fix PCIe5 PHY clocks

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Add the missing clkref enable and pipediv2 clocks to the PCIe5 PHY.

Fixes: 62ab23e155 ("arm64: dts: qcom: x1e80100: add PCIe5 nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240916082307.29393-4-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Johan Hovold
2024-09-16 10:23:07 +02:00
committed by Bjorn Andersson
parent 27727cb660
commit 0b80b3c0f6
1 changed files with 5 additions and 3 deletions
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8
arch/arm64/boot/dts/qcom/x1e80100.dtsi
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@@ -3126,14 +3126,16 @@ pcie5_phy: phy@1c06000 {
clocks = <&gcc GCC_PCIE_5_AUX_CLK>,
<&gcc GCC_PCIE_5_CFG_AHB_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&tcsr TCSR_PCIE_2L_5_CLKREF_EN>,
<&gcc GCC_PCIE_5_PHY_RCHNG_CLK>,
<&gcc GCC_PCIE_5_PIPE_CLK>;
<&gcc GCC_PCIE_5_PIPE_CLK>,
<&gcc GCC_PCIE_5_PIPEDIV2_CLK>;
clock-names = "aux",
"cfg_ahb",
"ref",
"rchng",
"pipe";
"pipe",
"pipediv2";
resets = <&gcc GCC_PCIE_5_PHY_BCR>;
reset-names = "phy";