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drm/msm/dpu: Correct UBWC settings for sc8280xp

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The UBWC settings need to match between the display and GPU.  When we
updated the GPU settings, we forgot to make the corresponding update on
the display side.

Reported-by: Steev Klimaszewski <steev@kali.org>
Fixes: 07e6de738a ("drm/msm/a690: Fix reg values for a690")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/569817/
Link: https://lore.kernel.org/r/20231130192119.32538-1-robdclark@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
This commit is contained in:
Rob Clark
2023-11-30 11:21:18 -08:00
committed by Dmitry Baryshkov
parent e2969ee302
commit 0b414c7314
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/msm/msm_mdss.c
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@@ -545,7 +545,7 @@ static const struct msm_mdss_data sc8280xp_data = {
.ubwc_dec_version = UBWC_4_0,
.ubwc_swizzle = 6,
.ubwc_static = 1,
.highest_bank_bit = 2,
.highest_bank_bit = 3,
.macrotile_mode = 1,
};