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drm/i915/tgl: Add Wa_1606054188:tgl
On Tiger Lake we do not support source keying in the pixel formats P010, P012, P016. v2: Move WA to end of function. Create helper function for format check. Less verbose debugging messaging. v3: whitespace v4(MattR): - Actually return EINVAL to reject this combination. - Pass format parameter as u32. - Make test TGL-specific for now. - Switch to per-device logging. - Shorten/simplify comment. Bspec: 52890 Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200224223651.3801646-1-matthew.d.roper@intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
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@@ -2077,6 +2077,18 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state,
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return 0;
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}
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static bool intel_format_is_p01x(u32 format)
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{
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switch (format) {
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case DRM_FORMAT_P010:
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case DRM_FORMAT_P012:
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case DRM_FORMAT_P016:
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return true;
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default:
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return false;
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}
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}
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static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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@@ -2155,6 +2167,15 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
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return -EINVAL;
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}
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/* Wa_1606054188:tgl */
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if (IS_TIGERLAKE(dev_priv) &&
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plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE &&
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intel_format_is_p01x(fb->format->format)) {
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drm_dbg_kms(&dev_priv->drm,
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"Source color keying not supported with P01x formats\n");
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return -EINVAL;
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}
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return 0;
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}
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