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net/mlx5: E-Switch, reserve and use same uplink metadata across ports

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When in switchdev mode wire traffic will hit the FDB in one of two
scenarios.

- Shared FDB, in that case traffic from both physical ports should be
  tagged by the same metadata value so a single FDB rule could catch
  traffic from both ports.

- Two E-Switches, traffic from each physical port will hit the native
  E-Switch which means traffic from one physical port can't reach the
  E-Switch of the other one.

Looking at those two scenarios it means we can always use the same metadata
value to tag wire traffic regardless of the mode.

Reserve a single metadata value to be used to tag wire traffic.

Signed-off-by: Sunil Rani <sunrani@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Sunil Rani
2021-03-10 00:53:39 +02:00
committed by Saeed Mahameed
parent c2c922dae7
commit 0b0ea3c5b1
1 changed files with 25 additions and 3 deletions
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28
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
View File

@@ -2845,6 +2845,19 @@ bool mlx5_esw_vport_match_metadata_supported(const struct mlx5_eswitch *esw)
return true;
}
#define MLX5_ESW_METADATA_RSVD_UPLINK 1
/* Share the same metadata for uplink's. This is fine because:
* (a) In shared FDB mode (LAG) both uplink's are treated the
* same and tagged with the same metadata.
* (b) In non shared FDB mode, packets from physical port0
* cannot hit eswitch of PF1 and vice versa.
*/
static u32 mlx5_esw_match_metadata_reserved(struct mlx5_eswitch *esw)
{
return MLX5_ESW_METADATA_RSVD_UPLINK;
}
u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw)
{
u32 vport_end_ida = (1 << ESW_VPORT_BITS) - 1;
@@ -2859,8 +2872,10 @@ u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw)
return 0;
/* Metadata is 4 bits of PFNUM and 12 bits of unique id */
/* Use only non-zero vport_id (1-4095) for all PF's */
id = ida_alloc_range(&esw->offloads.vport_metadata_ida, 1, vport_end_ida, GFP_KERNEL);
/* Use only non-zero vport_id (2-4095) for all PF's */
id = ida_alloc_range(&esw->offloads.vport_metadata_ida,
MLX5_ESW_METADATA_RSVD_UPLINK + 1,
vport_end_ida, GFP_KERNEL);
if (id < 0)
return 0;
id = (pf_num << ESW_VPORT_BITS) | id;
@@ -2878,7 +2893,11 @@ void mlx5_esw_match_metadata_free(struct mlx5_eswitch *esw, u32 metadata)
static int esw_offloads_vport_metadata_setup(struct mlx5_eswitch *esw,
struct mlx5_vport *vport)
{
vport->default_metadata = mlx5_esw_match_metadata_alloc(esw);
if (vport->vport == MLX5_VPORT_UPLINK)
vport->default_metadata = mlx5_esw_match_metadata_reserved(esw);
else
vport->default_metadata = mlx5_esw_match_metadata_alloc(esw);
vport->metadata = vport->default_metadata;
return vport->metadata ? 0 : -ENOSPC;
}
@@ -2889,6 +2908,9 @@ static void esw_offloads_vport_metadata_cleanup(struct mlx5_eswitch *esw,
if (!vport->default_metadata)
return;
if (vport->vport == MLX5_VPORT_UPLINK)
return;
WARN_ON(vport->metadata != vport->default_metadata);
mlx5_esw_match_metadata_free(esw, vport->default_metadata);
}