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arm64: dts: imx8ulp: increase the clock speed of LPSPI

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LPSPI transfer max speed is half of the root clock.
Increase the root clock speed to support faster data transmission.

And update the parent clock of all i2c/spi with IMX8ULP_CLK_FROSC_DIV2
which could produce accurate clock for i2c/spi usage.

Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Clark Wang
2022-08-31 22:25:52 +08:00
committed by Shawn Guo
parent d2209e6584
commit 0acd1b1cf3
1 changed files with 8 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm64/boot/dts/freescale/imx8ulp.dtsi
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@@ -223,7 +223,7 @@ lpi2c4: i2c@29370000 {
<&pcc3 IMX8ULP_CLK_LPI2C4>;
clock-names = "per", "ipg";
assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C4>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
assigned-clock-rates = <48000000>;
status = "disabled";
};
@@ -236,7 +236,7 @@ lpi2c5: i2c@29380000 {
<&pcc3 IMX8ULP_CLK_LPI2C5>;
clock-names = "per", "ipg";
assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C5>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
assigned-clock-rates = <48000000>;
status = "disabled";
};
@@ -269,8 +269,8 @@ lpspi4: spi@293b0000 {
<&pcc3 IMX8ULP_CLK_LPSPI4>;
clock-names = "per", "ipg";
assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI4>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
assigned-clock-rates = <16000000>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
assigned-clock-rates = <48000000>;
status = "disabled";
};
@@ -284,8 +284,8 @@ lpspi5: spi@293c0000 {
<&pcc3 IMX8ULP_CLK_LPSPI5>;
clock-names = "per", "ipg";
assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI5>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
assigned-clock-rates = <16000000>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
assigned-clock-rates = <48000000>;
status = "disabled";
};
};
@@ -311,7 +311,7 @@ lpi2c6: i2c@29840000 {
<&pcc4 IMX8ULP_CLK_LPI2C6>;
clock-names = "per", "ipg";
assigned-clocks = <&pcc4 IMX8ULP_CLK_LPI2C6>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
assigned-clock-rates = <48000000>;
status = "disabled";
};
@@ -324,7 +324,7 @@ lpi2c7: i2c@29850000 {
<&pcc4 IMX8ULP_CLK_LPI2C7>;
clock-names = "per", "ipg";
assigned-clocks = <&pcc4 IMX8ULP_CLK_LPI2C7>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
assigned-clock-rates = <48000000>;
status = "disabled";
};