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ARM: dts: imx6dl-eckelmann-ci4x10: configure ethernet reference clock parent
On this board the PHY is the ref clock provider. So, configure ethernet reference clock as input. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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committed by
Shawn Guo
parent
c89614079e
commit
088e350d2b
@@ -28,6 +28,7 @@ rmii_clk: clock-rmii {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "enet_ref_pad";
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};
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reg_usb_h1_vbus: regulator-usb-h1-vbus {
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@@ -64,6 +65,13 @@ &can2 {
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status = "okay";
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};
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&clks {
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clocks = <&rmii_clk>;
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clock-names = "enet_ref_pad";
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assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
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assigned-clock-parents = <&rmii_clk>;
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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@@ -297,11 +305,6 @@ &fec {
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phy-mode = "rmii";
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phy-reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
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phy-handle = <&phy>;
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clocks = <&clks IMX6QDL_CLK_ENET>,
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<&clks IMX6QDL_CLK_ENET>,
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<&rmii_clk>,
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<&clks IMX6QDL_CLK_ENET_REF>;
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clock-names = "ipg", "ahb", "ptp", "enet_out";
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status = "okay";
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mdio {
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