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Merge tag 'stm32-dt-for-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

Browse Source 
STM32 DT for v6.8, round 1

Highlights:
----------

- MCU:
  -  Add SPI support on STM32F746.
  -  Better describe vcc_3v3 for SD and DSI on stm32f469-disco.

- MPU:
  - STM32MP13:
    - Add DCMIPP (Digital Camera Memory Interface Piwel Processor)  on STM32MP135.

  - STMP32MP15:
    - Change "phys" affectation from board to Soc dtsi file for USB host as it is hard  linked
      to the port 0 of usbphyc.
    - Fix SCMI and No-SCMI compatible in boards.

  - STM32MP25:
    - Add BSEC support to read the device part number OTP and the package data register OTP.

* tag 'stm32-dt-for-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: add dcmipp support to stm32mp135
  arm64: dts: st: add bsec support to stm32mp25
  ARM: dts: stm32: Consolidate usbh_[eo]hci phy properties on stm32mp15
  ARM: dts: stm32: don't mix SCMI and non-SCMI board compatibles
  dt-bindings: arm: stm32: don't mix SCMI and non-SCMI board compatibles
  ARM: dts: stm32: minor whitespace cleanup around '='
  ARM: dts: stm32: add SPI support on STM32F746
  ARM: dts: stm32: add STM32F746 syscfg clock
  ARM: dts: stm32: use the same 3v3 for SD and DSI nodes on stm32f469-disco

Link: https://lore.kernel.org/r/9363227b-1c44-4a20-b245-efbbbf9ab1dd@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2023-12-21 16:17:22 +00:00
parent e0a220a3ad 2de1bb183a
commit 084d415d21
24 changed files with 107 additions and 64 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
Documentation/devicetree/bindings/arm/stm32/stm32.yaml
View File

@@ -82,29 +82,19 @@ properties:
- shiratech,stm32mp157a-iot-box # IoT Box
- shiratech,stm32mp157a-stinger96 # Stinger96
- st,stm32mp157c-ed1
- st,stm32mp157c-ed1-scmi
- st,stm32mp157a-dk1
- st,stm32mp157a-dk1-scmi
- st,stm32mp157c-dk2
- st,stm32mp157c-dk2-scmi
- const: st,stm32mp157
- items:
- const: st,stm32mp157a-dk1-scmi
- const: st,stm32mp157a-dk1
- const: st,stm32mp157
- items:
- const: st,stm32mp157c-dk2-scmi
- const: st,stm32mp157c-dk2
- const: st,stm32mp157
- items:
- const: st,stm32mp157c-ed1-scmi
- const: st,stm32mp157c-ed1
- const: st,stm32mp157
- items:
- const: st,stm32mp157c-ev1
- const: st,stm32mp157c-ed1
- const: st,stm32mp157
- items:
- const: st,stm32mp157c-ev1-scmi
- const: st,stm32mp157c-ev1
- const: st,stm32mp157c-ed1
- const: st,stm32mp157

15
arch/arm/boot/dts/st/stm32f469-disco.dts
View File

@@ -69,16 +69,9 @@ aliases {
serial0 = &usart3;
};
mmc_vcard: mmc_vcard {
vcc_3v3: vcc-3v3 {
compatible = "regulator-fixed";
regulator-name = "mmc_vcard";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdd_dsi: vdd-dsi {
compatible = "regulator-fixed";
regulator-name = "vdd_dsi";
regulator-name = "vcc_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
@@ -164,7 +157,7 @@ panel@0 {
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
power-supply = <&vdd_dsi>;
power-supply = <&vcc_3v3>;
status = "okay";
port {
@@ -219,7 +212,7 @@ timer@2 {
&sdio {
status = "okay";
vmmc-supply = <&mmc_vcard>;
vmmc-supply = <&vcc_3v3>;
cd-gpios = <&gpiog 2 GPIO_ACTIVE_LOW>;
broken-cd;
pinctrl-names = "default", "opendrain";

61
arch/arm/boot/dts/st/stm32f746.dtsi
View File

@@ -274,6 +274,26 @@ gcan3: gcan@40003600 {
clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
};
spi2: spi@40003800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f7-spi";
reg = <0x40003800 0x400>;
interrupts = <36>;
clocks = <&rcc 0 STM32F7_APB1_CLOCK(SPI2)>;
status = "disabled";
};
spi3: spi@40003c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f7-spi";
reg = <0x40003c00 0x400>;
interrupts = <51>;
clocks = <&rcc 0 STM32F7_APB1_CLOCK(SPI3)>;
status = "disabled";
};
usart2: serial@40004400 {
compatible = "st,stm32f7-uart";
reg = <0x40004400 0x400>;
@@ -491,9 +511,30 @@ sdio1: mmc@40012c00 {
status = "disabled";
};
spi1: spi@40013000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f7-spi";
reg = <0x40013000 0x400>;
interrupts = <35>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI1)>;
status = "disabled";
};
spi4: spi@40013400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f7-spi";
reg = <0x40013400 0x400>;
interrupts = <84>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI4)>;
status = "disabled";
};
syscfg: syscon@40013800 {
compatible = "st,stm32-syscfg", "syscon";
reg = <0x40013800 0x400>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(SYSCFG)>;
};
exti: interrupt-controller@40013c00 {
@@ -554,6 +595,26 @@ pwm {
};
};
spi5: spi@40015000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f7-spi";
reg = <0x40015000 0x400>;
interrupts = <85>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI5)>;
status = "disabled";
};
spi6: spi@40015400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f7-spi";
reg = <0x40015400 0x400>;
interrupts = <86>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI6)>;
status = "disabled";
};
ltdc: display-controller@40016800 {
compatible = "st,stm32-ltdc";
reg = <0x40016800 0x200>;

11
arch/arm/boot/dts/st/stm32mp135.dtsi
View File

@@ -8,5 +8,16 @@
/ {
soc {
dcmipp: dcmipp@5a000000 {
compatible = "st,stm32mp13-dcmipp";
reg = <0x5a000000 0x400>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rcc DCMIPP_R>;
clocks = <&rcc DCMIPP_K>;
status = "disabled";
port {
};
};
};
};

4
arch/arm/boot/dts/st/stm32mp151.dtsi
View File

@@ -1521,6 +1521,8 @@ usbh_ohci: usb@5800c000 {
clocks = <&usbphyc>, <&rcc USBH>;
resets = <&rcc USBH_R>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "disabled";
};
@@ -1531,6 +1533,8 @@ usbh_ehci: usb@5800d000 {
resets = <&rcc USBH_R>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
companion = <&usbh_ohci>;
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "disabled";
};

2
arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi
View File

@@ -206,8 +206,6 @@ pins {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};

4
arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts
View File

@@ -11,7 +11,7 @@
/ {
model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157a-dk1", "st,stm32mp157";
compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157";
reserved-memory {
optee@de000000 {
@@ -59,7 +59,7 @@ &m4_rproc {
/delete-property/ st,syscfg-holdboot;
resets = <&scmi_reset RST_SCMI_MCU>,
<&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
reset-names = "mcu_rst", "hold_boot";
reset-names = "mcu_rst", "hold_boot";
};
&rcc {

2
arch/arm/boot/dts/st/stm32mp157a-stinger96.dtsi
View File

@@ -313,8 +313,6 @@ &uart7 {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};

4
arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts
View File

@@ -11,7 +11,7 @@
/ {
model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157c-dk2", "st,stm32mp157";
compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157";
reserved-memory {
optee@de000000 {
@@ -65,7 +65,7 @@ &m4_rproc {
/delete-property/ st,syscfg-holdboot;
resets = <&scmi_reset RST_SCMI_MCU>,
<&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
reset-names = "mcu_rst", "hold_boot";
reset-names = "mcu_rst", "hold_boot";
};
&rcc {

4
arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts
View File

@@ -11,7 +11,7 @@
/ {
model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter";
compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157";
compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157";
reserved-memory {
optee@fe000000 {
@@ -64,7 +64,7 @@ &m4_rproc {
/delete-property/ st,syscfg-holdboot;
resets = <&scmi_reset RST_SCMI_MCU>,
<&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
reset-names = "mcu_rst", "hold_boot";
reset-names = "mcu_rst", "hold_boot";
};
&rcc {

4
arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi
View File

@@ -500,14 +500,10 @@ &usart3 {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};
&usbh_ohci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};

5
arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts
View File

@@ -11,8 +11,7 @@
/ {
model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother";
compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ev1", "st,stm32mp157c-ed1",
"st,stm32mp157";
compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157";
reserved-memory {
optee@fe000000 {
@@ -70,7 +69,7 @@ &m4_rproc {
/delete-property/ st,syscfg-holdboot;
resets = <&scmi_reset RST_SCMI_MCU>,
<&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
reset-names = "mcu_rst", "hold_boot";
reset-names = "mcu_rst", "hold_boot";
};
&rcc {

1
arch/arm/boot/dts/st/stm32mp157c-ev1.dts
View File

@@ -362,7 +362,6 @@ &usart3 {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;

4
arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts
View File

@@ -197,14 +197,10 @@ &uart4 {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};
&usbh_ohci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};

4
arch/arm/boot/dts/st/stm32mp157c-phycore-stm32mp15-som.dtsi
View File

@@ -547,14 +547,10 @@ &usart3 {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};
&usbh_ohci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};

3
arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi
View File

@@ -567,9 +567,6 @@ &usart3 {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};

1
arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi
View File

@@ -152,7 +152,6 @@ &uart8 { /* RS485 */
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
};

1
arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi
View File

@@ -305,7 +305,6 @@ &uart8 {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
};

2
arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi
View File

@@ -119,12 +119,10 @@ &uart8 {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
};
&usbh_ohci {
phys = <&usbphyc_port0>;
status = "okay";
};

2
arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi
View File

@@ -489,8 +489,6 @@ bluetooth {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};

2
arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi
View File

@@ -312,12 +312,10 @@ &usart3 { /* RS485 or RS232 */
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
};
&usbh_ohci {
phys = <&usbphyc_port0>;
status = "okay";
};

2
arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi
View File

@@ -168,12 +168,10 @@ &uart7 {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
};
&usbh_ohci {
phys = <&usbphyc_port0>;
status = "okay";
};

1
arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
View File

@@ -680,7 +680,6 @@ &usart3 {
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;

16
arch/arm64/boot/dts/st/stm32mp251.dtsi
View File

@@ -140,6 +140,22 @@ sdmmc1: mmc@48220000 {
};
};
bsec: efuse@44000000 {
compatible = "st,stm32mp25-bsec";
reg = <0x44000000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
part_number_otp@24 {
reg = <0x24 0x4>;
};
package_otp@1e8 {
reg = <0x1e8 0x1>;
bits = <0 3>;
};
};
syscfg: syscon@44230000 {
compatible = "st,stm32mp25-syscfg", "syscon";
reg = <0x44230000 0x10000>;