mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-08 00:29:36 -04:00
Merge tag 'iio-fixes-for-5.2a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus:
Jonathan writes:
First set of IIO fixes for the 5.2 cycle.
* ads124
- Avoid a buffer overrun when setting an array to 0.
* ads8688
- Don't use the pollfunc timestamp as it isn't set and would be wrong
anyway for a device that does sampling on demand.
* ds4422
- Fix masking on register used for chip verification. Wrong address
was being read.
* mpu6050
- Fix the fifo layout for ICM20602 to avoid underreading and hence failure
to move on to the next record in the fifo.
* NPCM ADC
- Make sure there is actually a valid regulator before reading its voltage.
* tag 'iio-fixes-for-5.2a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio:
iio: adc: ti-ads8688: fix timestamp is not updated in buffer
iio: dac: ds4422/ds4424 fix chip verification
iio: imu: mpu6050: Fix FIFO layout for ICM20602
iio: adc: ads124: avoid buffer overflow
iio: adc: modify NPCM ADC read reference voltage
This commit is contained in:
@@ -149,7 +149,7 @@ static int npcm_adc_read_raw(struct iio_dev *indio_dev,
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}
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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if (info->vref) {
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if (!IS_ERR(info->vref)) {
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vref_uv = regulator_get_voltage(info->vref);
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*val = vref_uv / 1000;
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} else {
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@@ -202,7 +202,7 @@ static int ads124s_read(struct iio_dev *indio_dev, unsigned int chan)
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};
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priv->data[0] = ADS124S08_CMD_RDATA;
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memset(&priv->data[1], ADS124S08_CMD_NOP, sizeof(priv->data));
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memset(&priv->data[1], ADS124S08_CMD_NOP, sizeof(priv->data) - 1);
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ret = spi_sync_transfer(priv->spi, t, ARRAY_SIZE(t));
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if (ret < 0)
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@@ -397,7 +397,7 @@ static irqreturn_t ads8688_trigger_handler(int irq, void *p)
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}
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iio_push_to_buffers_with_timestamp(indio_dev, buffer,
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pf->timestamp);
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iio_get_time_ns(indio_dev));
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iio_trigger_notify_done(indio_dev->trig);
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@@ -166,7 +166,7 @@ static int ds4424_verify_chip(struct iio_dev *indio_dev)
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{
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int ret, val;
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ret = ds4424_get_value(indio_dev, &val, DS4424_DAC_ADDR(0));
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ret = ds4424_get_value(indio_dev, &val, 0);
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if (ret < 0)
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dev_err(&indio_dev->dev,
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"%s failed. ret: %d\n", __func__, ret);
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@@ -471,7 +471,10 @@ inv_mpu6050_read_raw(struct iio_dev *indio_dev,
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return IIO_VAL_INT_PLUS_MICRO;
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case IIO_TEMP:
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*val = 0;
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*val2 = INV_MPU6050_TEMP_SCALE;
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if (st->chip_type == INV_ICM20602)
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*val2 = INV_ICM20602_TEMP_SCALE;
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else
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*val2 = INV_MPU6050_TEMP_SCALE;
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return IIO_VAL_INT_PLUS_MICRO;
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default:
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@@ -480,7 +483,10 @@ inv_mpu6050_read_raw(struct iio_dev *indio_dev,
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case IIO_CHAN_INFO_OFFSET:
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switch (chan->type) {
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case IIO_TEMP:
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*val = INV_MPU6050_TEMP_OFFSET;
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if (st->chip_type == INV_ICM20602)
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*val = INV_ICM20602_TEMP_OFFSET;
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else
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*val = INV_MPU6050_TEMP_OFFSET;
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return IIO_VAL_INT;
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default:
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@@ -847,6 +853,32 @@ static const struct iio_chan_spec inv_mpu_channels[] = {
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INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
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};
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static const struct iio_chan_spec inv_icm20602_channels[] = {
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IIO_CHAN_SOFT_TIMESTAMP(INV_ICM20602_SCAN_TIMESTAMP),
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{
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.type = IIO_TEMP,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
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| BIT(IIO_CHAN_INFO_OFFSET)
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| BIT(IIO_CHAN_INFO_SCALE),
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.scan_index = INV_ICM20602_SCAN_TEMP,
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.scan_type = {
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.sign = 's',
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.realbits = 16,
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.storagebits = 16,
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.shift = 0,
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.endianness = IIO_BE,
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},
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},
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INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_ICM20602_SCAN_GYRO_X),
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INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_ICM20602_SCAN_GYRO_Y),
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INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_ICM20602_SCAN_GYRO_Z),
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INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_ICM20602_SCAN_ACCL_Y),
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INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_ICM20602_SCAN_ACCL_X),
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INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_ICM20602_SCAN_ACCL_Z),
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};
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/*
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* The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
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* INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
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@@ -1102,8 +1134,14 @@ int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
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indio_dev->name = name;
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else
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indio_dev->name = dev_name(dev);
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indio_dev->channels = inv_mpu_channels;
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indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
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if (chip_type == INV_ICM20602) {
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indio_dev->channels = inv_icm20602_channels;
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indio_dev->num_channels = ARRAY_SIZE(inv_icm20602_channels);
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} else {
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indio_dev->channels = inv_mpu_channels;
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indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
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}
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indio_dev->info = &mpu_info;
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indio_dev->modes = INDIO_BUFFER_TRIGGERED;
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@@ -208,6 +208,9 @@ struct inv_mpu6050_state {
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#define INV_MPU6050_BYTES_PER_3AXIS_SENSOR 6
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#define INV_MPU6050_FIFO_COUNT_BYTE 2
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/* ICM20602 FIFO samples include temperature readings */
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#define INV_ICM20602_BYTES_PER_TEMP_SENSOR 2
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/* mpu6500 registers */
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#define INV_MPU6500_REG_ACCEL_CONFIG_2 0x1D
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#define INV_MPU6500_REG_ACCEL_OFFSET 0x77
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@@ -229,6 +232,9 @@ struct inv_mpu6050_state {
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#define INV_MPU6050_GYRO_CONFIG_FSR_SHIFT 3
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#define INV_MPU6050_ACCL_CONFIG_FSR_SHIFT 3
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#define INV_ICM20602_TEMP_OFFSET 8170
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#define INV_ICM20602_TEMP_SCALE 3060
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/* 6 + 6 round up and plus 8 */
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#define INV_MPU6050_OUTPUT_DATA_SIZE 24
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@@ -270,7 +276,7 @@ struct inv_mpu6050_state {
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#define INV_ICM20608_WHOAMI_VALUE 0xAF
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#define INV_ICM20602_WHOAMI_VALUE 0x12
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/* scan element definition */
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/* scan element definition for generic MPU6xxx devices */
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enum inv_mpu6050_scan {
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INV_MPU6050_SCAN_ACCL_X,
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INV_MPU6050_SCAN_ACCL_Y,
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@@ -281,6 +287,18 @@ enum inv_mpu6050_scan {
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INV_MPU6050_SCAN_TIMESTAMP,
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};
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/* scan element definition for ICM20602, which includes temperature */
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enum inv_icm20602_scan {
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INV_ICM20602_SCAN_ACCL_X,
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INV_ICM20602_SCAN_ACCL_Y,
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INV_ICM20602_SCAN_ACCL_Z,
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INV_ICM20602_SCAN_TEMP,
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INV_ICM20602_SCAN_GYRO_X,
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INV_ICM20602_SCAN_GYRO_Y,
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INV_ICM20602_SCAN_GYRO_Z,
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INV_ICM20602_SCAN_TIMESTAMP,
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};
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enum inv_mpu6050_filter_e {
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INV_MPU6050_FILTER_256HZ_NOLPF2 = 0,
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INV_MPU6050_FILTER_188HZ,
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@@ -207,6 +207,9 @@ irqreturn_t inv_mpu6050_read_fifo(int irq, void *p)
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if (st->chip_config.gyro_fifo_enable)
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bytes_per_datum += INV_MPU6050_BYTES_PER_3AXIS_SENSOR;
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if (st->chip_type == INV_ICM20602)
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bytes_per_datum += INV_ICM20602_BYTES_PER_TEMP_SENSOR;
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/*
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* read fifo_count register to know how many bytes are inside the FIFO
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* right now
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