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Merge branch 'pci/controller/dwc-qcom'

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- Advertise 'Hot-Plug Capable' and set 'No Command Completed Support' since
  Qcom Root Ports support hotplug events like DL_Up/Down and can accept
  writes to Slot Control without delays between writes (Krishna Chaitanya
  Chundru)

* pci/controller/dwc-qcom:
  PCI: qcom: Advertise Hotplug Slot Capability with no Command Completion support
This commit is contained in:
Bjorn Helgaas
2026-04-13 12:50:23 -05:00
parent b94fd08746 33a76fc3c3
commit 07f7d0f0ee
1 changed files with 11 additions and 6 deletions
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17
drivers/pci/controller/dwc/pcie-qcom.c
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@@ -350,15 +350,20 @@ static void qcom_pcie_clear_aspm_l0s(struct dw_pcie *pci)
dw_pcie_dbi_ro_wr_dis(pci);
}
static void qcom_pcie_clear_hpc(struct dw_pcie *pci)
static void qcom_pcie_set_slot_nccs(struct dw_pcie *pci)
{
u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
u32 val;
dw_pcie_dbi_ro_wr_en(pci);
/*
* Qcom PCIe Root Ports do not support generating command completion
* notifications for the Hot-Plug commands. So set the NCCS field to
* avoid waiting for the completions.
*/
val = readl(pci->dbi_base + offset + PCI_EXP_SLTCAP);
val &= ~PCI_EXP_SLTCAP_HPC;
val |= PCI_EXP_SLTCAP_NCCS;
writel(val, pci->dbi_base + offset + PCI_EXP_SLTCAP);
dw_pcie_dbi_ro_wr_dis(pci);
@@ -558,7 +563,7 @@ static int qcom_pcie_post_init_2_1_0(struct qcom_pcie *pcie)
writel(CFG_BRIDGE_SB_INIT,
pci->dbi_base + AXI_MSTR_RESP_COMP_CTRL1);
qcom_pcie_clear_hpc(pcie->pci);
qcom_pcie_set_slot_nccs(pcie->pci);
return 0;
}
@@ -638,7 +643,7 @@ static int qcom_pcie_post_init_1_0_0(struct qcom_pcie *pcie)
writel(val, pcie->parf + PARF_AXI_MSTR_WR_ADDR_HALT);
}
qcom_pcie_clear_hpc(pcie->pci);
qcom_pcie_set_slot_nccs(pcie->pci);
return 0;
}
@@ -731,7 +736,7 @@ static int qcom_pcie_post_init_2_3_2(struct qcom_pcie *pcie)
val |= EN;
writel(val, pcie->parf + PARF_AXI_MSTR_WR_ADDR_HALT_V2);
qcom_pcie_clear_hpc(pcie->pci);
qcom_pcie_set_slot_nccs(pcie->pci);
return 0;
}
@@ -1037,7 +1042,7 @@ static int qcom_pcie_post_init_2_7_0(struct qcom_pcie *pcie)
writel(WR_NO_SNOOP_OVERRIDE_EN | RD_NO_SNOOP_OVERRIDE_EN,
pcie->parf + PARF_NO_SNOOP_OVERRIDE);
qcom_pcie_clear_hpc(pcie->pci);
qcom_pcie_set_slot_nccs(pcie->pci);
return 0;
}