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drm/msm/dpu: drop the regdma configuration

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The regdma is currently not used by the current driver. We have no way
to practically verify that the regdma is described correctly. Drop it
now.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/533148/
Link: https://lore.kernel.org/r/20230420222558.1208887-1-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
This commit is contained in:
Dmitry Baryshkov
2023-04-21 01:25:57 +03:00
parent 8d6dad490a
commit 078f766e16
12 changed files with 0 additions and 77 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
View File

@@ -195,7 +195,6 @@ const struct dpu_mdss_cfg dpu_msm8998_cfg = {
.intf = msm8998_intf,
.vbif_count = ARRAY_SIZE(msm8998_vbif),
.vbif = msm8998_vbif,
.reg_dma_count = 0,
.perf = &msm8998_perf_data,
.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
BIT(MDP_SSPP_TOP0_INTR2) | \

2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
View File

@@ -193,8 +193,6 @@ const struct dpu_mdss_cfg dpu_sdm845_cfg = {
.intf = sdm845_intf,
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = &sdm845_regdma,
.perf = &sdm845_perf_data,
.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
BIT(MDP_SSPP_TOP0_INTR2) | \

2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
View File

@@ -220,8 +220,6 @@ const struct dpu_mdss_cfg dpu_sm8150_cfg = {
.intf = sm8150_intf,
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = &sm8150_regdma,
.perf = &sm8150_perf_data,
.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
BIT(MDP_SSPP_TOP0_INTR2) | \

2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
View File

@@ -222,8 +222,6 @@ const struct dpu_mdss_cfg dpu_sc8180x_cfg = {
.intf = sc8180x_intf,
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = &sm8150_regdma,
.perf = &sc8180x_perf_data,
.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
BIT(MDP_SSPP_TOP0_INTR2) | \

2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
View File

@@ -228,8 +228,6 @@ const struct dpu_mdss_cfg dpu_sm8250_cfg = {
.vbif = sdm845_vbif,
.wb_count = ARRAY_SIZE(sm8250_wb),
.wb = sm8250_wb,
.reg_dma_count = 1,
.dma_cfg = &sm8250_regdma,
.perf = &sm8250_perf_data,
.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
BIT(MDP_SSPP_TOP0_INTR2) | \

2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
View File

@@ -143,8 +143,6 @@ const struct dpu_mdss_cfg dpu_sc7180_cfg = {
.wb = sc7180_wb,
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = &sdm845_regdma,
.perf = &sc7180_perf_data,
.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
BIT(MDP_SSPP_TOP0_INTR2) | \

2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
View File

@@ -211,8 +211,6 @@ const struct dpu_mdss_cfg dpu_sm8350_cfg = {
.intf = sm8350_intf,
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = &sm8350_regdma,
.perf = &sm8350_perf_data,
.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
BIT(MDP_SSPP_TOP0_INTR2) | \

2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
View File

@@ -203,8 +203,6 @@ const struct dpu_mdss_cfg dpu_sc8280xp_cfg = {
.intf = sc8280xp_intf,
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = &sc8280xp_regdma,
.perf = &sc8280xp_perf_data,
.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
BIT(MDP_SSPP_TOP0_INTR2) | \

2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
View File

@@ -219,8 +219,6 @@ const struct dpu_mdss_cfg dpu_sm8450_cfg = {
.intf = sm8450_intf,
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = &sm8450_regdma,
.perf = &sm8450_perf_data,
.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
BIT(MDP_SSPP_TOP0_INTR2) | \

2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
View File

@@ -224,8 +224,6 @@ const struct dpu_mdss_cfg dpu_sm8550_cfg = {
.intf = sm8550_intf,
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = &sm8450_regdma,
.perf = &sm8550_perf_data,
.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
BIT(MDP_SSPP_TOP0_INTR2) | \

40
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
View File

@@ -650,46 +650,6 @@ static const struct dpu_vbif_cfg sdm845_vbif[] = {
},
};
static const struct dpu_reg_dma_cfg sc8280xp_regdma = {
.base = 0x0,
.version = 0x00020000,
.trigger_sel_off = 0x119c,
.xin_id = 7,
.clk_ctrl = DPU_CLK_CTRL_REG_DMA,
};
static const struct dpu_reg_dma_cfg sdm845_regdma = {
.base = 0x0, .version = 0x1, .trigger_sel_off = 0x119c
};
static const struct dpu_reg_dma_cfg sm8150_regdma = {
.base = 0x0, .version = 0x00010001, .trigger_sel_off = 0x119c
};
static const struct dpu_reg_dma_cfg sm8250_regdma = {
.base = 0x0,
.version = 0x00010002,
.trigger_sel_off = 0x119c,
.xin_id = 7,
.clk_ctrl = DPU_CLK_CTRL_REG_DMA,
};
static const struct dpu_reg_dma_cfg sm8350_regdma = {
.base = 0x400,
.version = 0x00020000,
.trigger_sel_off = 0x119c,
.xin_id = 7,
.clk_ctrl = DPU_CLK_CTRL_REG_DMA,
};
static const struct dpu_reg_dma_cfg sm8450_regdma = {
.base = 0x0,
.version = 0x00020000,
.trigger_sel_off = 0x119c,
.xin_id = 7,
.clk_ctrl = DPU_CLK_CTRL_REG_DMA,
};
/*************************************************************
* PERF data config
*************************************************************/

18
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
View File

@@ -720,21 +720,6 @@ struct dpu_vbif_cfg {
u32 memtype_count;
u32 memtype[MAX_XIN_COUNT];
};
/**
* struct dpu_reg_dma_cfg - information of lut dma blocks
* @id enum identifying this block
* @base register offset of this block
* @features bit mask identifying sub-blocks/features
* @version version of lutdma hw block
* @trigger_sel_off offset to trigger select registers of lutdma
*/
struct dpu_reg_dma_cfg {
DPU_HW_BLK_INFO;
u32 version;
u32 trigger_sel_off;
u32 xin_id;
enum dpu_clk_ctrl_type clk_ctrl;
};
/**
* Define CDP use cases
@@ -850,9 +835,6 @@ struct dpu_mdss_cfg {
u32 wb_count;
const struct dpu_wb_cfg *wb;
u32 reg_dma_count;
const struct dpu_reg_dma_cfg *dma_cfg;
u32 ad_count;
u32 dspp_count;