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drm/amd/amdgpu: Disable MMHUB prefetch for ISP v4.1.1
Disable MMHUB prefetch for ISP v4.1.1 as a temporary WA until the GART supports MMHUB TLSi and SAW for ISP HW to access GART memory using the TLSi path. Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Pratap Nirujogi <pratap.nirujogi@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
05bafe95e5
commit
062666ffbc
@@ -104,6 +104,18 @@ static int isp_v4_1_1_hw_init(struct amdgpu_isp *isp)
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goto failure;
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}
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/*
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* Temporary WA added to disable MMHUB TLSi until the GART initialization
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* is ready to support MMHUB TLSi and SAW for ISP HW to access GART memory
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* using the TLSi path
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*/
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WREG32(mmDAGB1_WRCLI5_V4_1_1 >> 2, 0xFE5FEAA8);
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WREG32(mmDAGB1_WRCLI9_V4_1_1 >> 2, 0xFE5FEAA8);
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WREG32(mmDAGB1_WRCLI10_V4_1_1 >> 2, 0xFE5FEAA8);
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WREG32(mmDAGB1_WRCLI14_V4_1_1 >> 2, 0xFE5FEAA8);
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WREG32(mmDAGB1_WRCLI19_V4_1_1 >> 2, 0xFE5FEAA8);
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WREG32(mmDAGB1_WRCLI20_V4_1_1 >> 2, 0xFE5FEAA8);
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return 0;
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failure:
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@@ -32,6 +32,13 @@
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#include "ivsrcid/isp/irqsrcs_isp_4_1.h"
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#define mmDAGB1_WRCLI5_V4_1_1 0x68420
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#define mmDAGB1_WRCLI9_V4_1_1 0x68430
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#define mmDAGB1_WRCLI10_V4_1_1 0x68434
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#define mmDAGB1_WRCLI14_V4_1_1 0x68444
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#define mmDAGB1_WRCLI19_V4_1_1 0x68458
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#define mmDAGB1_WRCLI20_V4_1_1 0x6845C
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#define MAX_ISP411_INT_SRC 8
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void isp_v4_1_1_set_isp_funcs(struct amdgpu_isp *isp);
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