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Merge tag 'samsung-soc-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc
Samsung mach/soc changes for v5.14 1. Fix: add missing of_node_put. 2. Extend Samsung maintainers entry to cover Samsung PWM driver files, because they do not have a dedicated entry. 3. Minor cleanups. * tag 'samsung-soc-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: MAINTAINERS: Include Samsung PWM in Samsung SoC entry soc: samsung: pmu: drop EXYNOS_CENTRAL_SEQ_OPTION defines ARM: exynos: add missing of_node_put for loop iteration ARM: s3c: Remove unnecessary break in RX1950 Link: https://lore.kernel.org/r/20210610074055.12474-2-krzysztof.kozlowski@canonical.com Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
@@ -2436,9 +2436,12 @@ F: drivers/*/*/*s3c24*
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F: drivers/*/*s3c24*
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F: drivers/*/*s3c64xx*
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F: drivers/*/*s5pv210*
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F: drivers/clocksource/samsung_pwm_timer.c
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F: drivers/memory/samsung/
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F: drivers/pwm/pwm-samsung.c
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F: drivers/soc/samsung/
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F: drivers/tty/serial/samsung*
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F: include/clocksource/samsung_pwm.h
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F: include/linux/platform_data/*s3c*
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F: include/linux/serial_s3c.h
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F: include/linux/soc/samsung/
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@@ -55,6 +55,7 @@ void __init exynos_sysram_init(void)
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sysram_base_addr = of_iomap(node, 0);
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sysram_base_phys = of_translate_address(node,
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of_get_address(node, 0, NULL, NULL));
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of_node_put(node);
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break;
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}
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@@ -62,6 +63,7 @@ void __init exynos_sysram_init(void)
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if (!of_device_is_available(node))
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continue;
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sysram_ns_base_addr = of_iomap(node, 0);
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of_node_put(node);
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break;
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}
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}
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@@ -271,7 +271,6 @@ static int rx1950_led_blink_set(struct gpio_desc *desc, int state,
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break;
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default:
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return -EINVAL;
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break;
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}
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if (delay_on && delay_off && !*delay_on && !*delay_off)
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@@ -611,12 +611,6 @@
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#define EXYNOS5420_FSYS2_OPTION 0x4168
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#define EXYNOS5420_PSGEN_OPTION 0x4188
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/* For EXYNOS_CENTRAL_SEQ_OPTION */
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#define EXYNOS5_USE_STANDBYWFI_ARM_CORE0 BIT(16)
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#define EXYNOS5_USE_STANDBYWFI_ARM_CORE1 BUT(17)
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#define EXYNOS5_USE_STANDBYWFE_ARM_CORE0 BIT(24)
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#define EXYNOS5_USE_STANDBYWFE_ARM_CORE1 BIT(25)
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#define EXYNOS5420_ARM_USE_STANDBY_WFI0 BIT(4)
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#define EXYNOS5420_ARM_USE_STANDBY_WFI1 BIT(5)
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#define EXYNOS5420_ARM_USE_STANDBY_WFI2 BIT(6)
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