drm/i915/cdclk: Use intel_cdclk_ppc() in intel_modeset_readout_hw_state()

Replace the hand roller intel_cdclk_ppc() with the real thing
in intel_modeset_readout_hw_state().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260715120926.10786-2-ville.syrjala@linux.intel.com
Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>
This commit is contained in:
Ville Syrjälä
2026-07-15 15:09:23 +03:00
parent 67e955e073
commit 04e1c59b34
3 changed files with 6 additions and 9 deletions

View File

@@ -2908,7 +2908,7 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state)
}
/* pixels per CDCLK */
static int intel_cdclk_ppc(struct intel_display *display, bool double_wide)
int intel_cdclk_ppc(struct intel_display *display, bool double_wide)
{
return DISPLAY_VER(display) >= 10 || double_wide ? 2 : 1;
}

View File

@@ -22,6 +22,7 @@ struct intel_cdclk_config {
bool joined_mbus;
};
int intel_cdclk_ppc(struct intel_display *display, bool double_wide);
void intel_cdclk_init_hw(struct intel_display *display);
void intel_cdclk_uninit_hw(struct intel_display *display);
void intel_init_cdclk_hooks(struct intel_display *display);

View File

@@ -854,14 +854,10 @@ static void intel_modeset_readout_hw_state(struct intel_display *display)
* FIXME don't have the fb yet, so can't
* use plane->min_cdclk() :(
*/
if (plane_state->uapi.visible && plane->min_cdclk) {
if (crtc_state->double_wide || DISPLAY_VER(display) >= 10)
crtc_state->plane_min_cdclk[plane->id] =
DIV_ROUND_UP(crtc_state->pixel_rate, 2);
else
crtc_state->plane_min_cdclk[plane->id] =
crtc_state->pixel_rate;
}
if (plane_state->uapi.visible && plane->min_cdclk)
crtc_state->plane_min_cdclk[plane->id] =
DIV_ROUND_UP(crtc_state->pixel_rate,
intel_cdclk_ppc(display, crtc_state->double_wide));
drm_dbg_kms(display->drm,
"[PLANE:%d:%s] min_cdclk %d kHz\n",
plane->base.base.id, plane->base.name,