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drm/amdgpu: select HDP ref/mask according to gfx ring pipe
Use correct ref/mask for differnent gfx ring pipe. This should fix the gfx hang issue after enabling gfx pipe1. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2117 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: ZhenGuo Yin <zhenguo.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher
parent
60df562814
commit
0453e5f220
@@ -8317,7 +8317,7 @@ static void gfx_v10_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
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}
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reg_mem_engine = 0;
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} else {
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ref_and_mask = nbio_hf_reg->ref_and_mask_cp0;
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ref_and_mask = nbio_hf_reg->ref_and_mask_cp0 << ring->pipe;
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reg_mem_engine = 1; /* pfp */
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}
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