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net: ethernet: mtk-star-emac: enable half duplex hardware support

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Current driver doesn't support half duplex correctly.
This patch enable half duplex capability in hardware.

Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Signed-off-by: Yinghua Pan <ot_yinghua.pan@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Biao Huang
2022-06-29 11:17:43 +08:00
committed by David S. Miller
parent 0a8bd81fd6
commit 02e9ce07d8
1 changed files with 14 additions and 20 deletions
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34
drivers/net/ethernet/mediatek/mtk_star_emac.c
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@@ -883,32 +883,26 @@ static void mtk_star_phy_config(struct mtk_star_priv *priv)
val <<= MTK_STAR_OFF_PHY_CTRL1_FORCE_SPD;
val |= MTK_STAR_BIT_PHY_CTRL1_AN_EN;
val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_RX;
val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_TX;
/* Only full-duplex supported for now. */
val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_DPX;
if (priv->pause) {
val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_RX;
val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_TX;
val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_DPX;
} else {
val &= ~MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_RX;
val &= ~MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_TX;
val &= ~MTK_STAR_BIT_PHY_CTRL1_FORCE_DPX;
}
regmap_write(priv->regs, MTK_STAR_REG_PHY_CTRL1, val);
if (priv->pause) {
val = MTK_STAR_VAL_FC_CFG_SEND_PAUSE_TH_2K;
val <<= MTK_STAR_OFF_FC_CFG_SEND_PAUSE_TH;
val |= MTK_STAR_BIT_FC_CFG_UC_PAUSE_DIR;
} else {
val = 0;
}
val = MTK_STAR_VAL_FC_CFG_SEND_PAUSE_TH_2K;
val <<= MTK_STAR_OFF_FC_CFG_SEND_PAUSE_TH;
val |= MTK_STAR_BIT_FC_CFG_UC_PAUSE_DIR;
regmap_update_bits(priv->regs, MTK_STAR_REG_FC_CFG,
MTK_STAR_MSK_FC_CFG_SEND_PAUSE_TH |
MTK_STAR_BIT_FC_CFG_UC_PAUSE_DIR, val);
if (priv->pause) {
val = MTK_STAR_VAL_EXT_CFG_SND_PAUSE_RLS_1K;
val <<= MTK_STAR_OFF_EXT_CFG_SND_PAUSE_RLS;
} else {
val = 0;
}
val = MTK_STAR_VAL_EXT_CFG_SND_PAUSE_RLS_1K;
val <<= MTK_STAR_OFF_EXT_CFG_SND_PAUSE_RLS;
regmap_update_bits(priv->regs, MTK_STAR_REG_EXT_CFG,
MTK_STAR_MSK_EXT_CFG_SND_PAUSE_RLS, val);
}