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synced 2026-07-23 00:27:30 -04:00
net/mlx5: Extend query_esw_functions output for multi-function support
Update the query_esw_functions command to support a new response layout that can report data for multiple network functions. Setting bit 14 of the op_mod field selects the v1 layout with network_function_params entries instead of the legacy host_params_context. The query_host_net_function_v1 read-only capability indicates firmware support for layout version 1, and query_host_net_function_num_max advertises the maximum number of network function entries. Define a new network_function_params layout and a net_function_params union that groups host_params_context and network_function_params. Rework the query_esw_functions output to use a flexible array of this union, and adjust existing driver callers to use it. Signed-off-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20260428053851.220089-5-tariqt@nvidia.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
This commit is contained in:
committed by
Leon Romanovsky
parent
e2337517e1
commit
02c54621e8
@@ -1045,6 +1045,7 @@ const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
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static int mlx5_esw_host_functions_enabled_query(struct mlx5_eswitch *esw)
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{
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const u32 *query_host_out;
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void *host_params;
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if (!mlx5_core_is_ecpf_esw_manager(esw->dev))
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return 0;
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@@ -1053,9 +1054,11 @@ static int mlx5_esw_host_functions_enabled_query(struct mlx5_eswitch *esw)
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if (IS_ERR(query_host_out))
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return PTR_ERR(query_host_out);
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host_params = MLX5_ADDR_OF(query_esw_functions_out,
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query_host_out, net_function_params);
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esw->esw_funcs.host_funcs_disabled =
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MLX5_GET(query_esw_functions_out, query_host_out,
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host_params_context.host_pf_not_exist);
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MLX5_GET(host_params_context, host_params,
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host_pf_not_exist);
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kvfree(query_host_out);
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return 0;
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@@ -1475,6 +1478,7 @@ static void mlx5_eswitch_get_devlink_param(struct mlx5_eswitch *esw)
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static void
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mlx5_eswitch_update_num_of_vfs(struct mlx5_eswitch *esw, int num_vfs)
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{
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void *host_params;
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const u32 *out;
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if (num_vfs < 0)
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@@ -1489,8 +1493,10 @@ mlx5_eswitch_update_num_of_vfs(struct mlx5_eswitch *esw, int num_vfs)
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if (IS_ERR(out))
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return;
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esw->esw_funcs.num_vfs = MLX5_GET(query_esw_functions_out, out,
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host_params_context.host_num_of_vfs);
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host_params = MLX5_ADDR_OF(query_esw_functions_out, out,
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net_function_params);
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esw->esw_funcs.num_vfs = MLX5_GET(host_params_context, host_params,
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host_num_of_vfs);
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if (mlx5_core_ec_sriov_enabled(esw->dev))
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esw->esw_funcs.num_ec_vfs = num_vfs;
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@@ -3664,6 +3664,7 @@ esw_vfs_changed_event_handler(struct mlx5_eswitch *esw, int work_gen,
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{
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struct devlink *devlink;
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bool host_pf_disabled;
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void *host_params;
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u16 new_num_vfs;
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devlink = priv_to_devlink(esw->dev);
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@@ -3673,10 +3674,12 @@ esw_vfs_changed_event_handler(struct mlx5_eswitch *esw, int work_gen,
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if (work_gen != atomic_read(&esw->esw_funcs.generation))
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goto unlock;
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new_num_vfs = MLX5_GET(query_esw_functions_out, out,
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host_params_context.host_num_of_vfs);
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host_pf_disabled = MLX5_GET(query_esw_functions_out, out,
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host_params_context.host_pf_disabled);
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host_params = MLX5_ADDR_OF(query_esw_functions_out, out,
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net_function_params);
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new_num_vfs = MLX5_GET(host_params_context, host_params,
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host_num_of_vfs);
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host_pf_disabled = MLX5_GET(host_params_context, host_params,
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host_pf_disabled);
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if (new_num_vfs == esw->esw_funcs.num_vfs || host_pf_disabled)
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goto unlock;
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@@ -3743,6 +3746,7 @@ int mlx5_esw_funcs_changed_handler(struct notifier_block *nb, unsigned long type
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static int mlx5_esw_host_number_init(struct mlx5_eswitch *esw)
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{
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const u32 *query_host_out;
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void *host_params;
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if (!mlx5_core_is_ecpf_esw_manager(esw->dev))
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return 0;
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@@ -3752,8 +3756,10 @@ static int mlx5_esw_host_number_init(struct mlx5_eswitch *esw)
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return PTR_ERR(query_host_out);
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/* Mark non local controller with non zero controller number. */
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esw->offloads.host_number = MLX5_GET(query_esw_functions_out, query_host_out,
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host_params_context.host_number);
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host_params = MLX5_ADDR_OF(query_esw_functions_out,
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query_host_out, net_function_params);
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esw->offloads.host_number = MLX5_GET(host_params_context,
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host_params, host_number);
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kvfree(query_host_out);
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return 0;
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}
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@@ -4792,6 +4798,7 @@ int mlx5_devlink_pf_port_fn_state_get(struct devlink_port *port,
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{
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struct mlx5_vport *vport = mlx5_devlink_port_vport_get(port);
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const u32 *query_out;
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void *host_params;
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bool pf_disabled;
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if (vport->vport != MLX5_VPORT_HOST_PF) {
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@@ -4806,8 +4813,10 @@ int mlx5_devlink_pf_port_fn_state_get(struct devlink_port *port,
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if (IS_ERR(query_out))
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return PTR_ERR(query_out);
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pf_disabled = MLX5_GET(query_esw_functions_out, query_out,
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host_params_context.host_pf_disabled);
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host_params = MLX5_ADDR_OF(query_esw_functions_out, query_out,
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net_function_params);
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pf_disabled = MLX5_GET(host_params_context, host_params,
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host_pf_disabled);
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*opstate = pf_disabled ? DEVLINK_PORT_FN_OPSTATE_DETACHED :
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DEVLINK_PORT_FN_OPSTATE_ATTACHED;
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@@ -4,14 +4,6 @@
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#ifndef __MLX5_IFC_VHCA_EVENT_H__
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#define __MLX5_IFC_VHCA_EVENT_H__
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enum mlx5_ifc_vhca_state {
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MLX5_VHCA_STATE_INVALID = 0x0,
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MLX5_VHCA_STATE_ALLOCATED = 0x1,
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MLX5_VHCA_STATE_ACTIVE = 0x2,
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MLX5_VHCA_STATE_IN_USE = 0x3,
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MLX5_VHCA_STATE_TEARDOWN_REQUEST = 0x4,
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};
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struct mlx5_ifc_vhca_state_context_bits {
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u8 arm_change_event[0x1];
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u8 reserved_at_1[0xb];
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@@ -274,6 +274,7 @@ void mlx5_sriov_detach(struct mlx5_core_dev *dev)
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static u16 mlx5_get_max_vfs(struct mlx5_core_dev *dev)
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{
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u16 host_total_vfs;
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void *host_params;
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const u32 *out;
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if (mlx5_core_is_ecpf_esw_manager(dev)) {
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@@ -284,8 +285,10 @@ static u16 mlx5_get_max_vfs(struct mlx5_core_dev *dev)
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*/
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if (IS_ERR(out))
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goto done;
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host_total_vfs = MLX5_GET(query_esw_functions_out, out,
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host_params_context.host_total_vfs);
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host_params = MLX5_ADDR_OF(query_esw_functions_out, out,
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net_function_params);
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host_total_vfs = MLX5_GET(host_params_context, host_params,
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host_total_vfs);
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kvfree(out);
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return host_total_vfs;
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}
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@@ -1935,7 +1935,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
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u8 max_flow_counter_31_16[0x10];
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u8 max_wqe_sz_sq_dc[0x10];
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u8 reserved_at_2e0[0x7];
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u8 query_host_net_function_num_max[0x5];
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u8 reserved_at_2e5[0x2];
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u8 max_qp_mcg[0x19];
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u8 reserved_at_300[0x10];
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@@ -2027,7 +2028,7 @@ struct mlx5_ifc_cmd_hca_cap_bits {
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u8 log_max_current_mc_list[0x5];
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u8 reserved_at_3f8[0x1];
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u8 silent_mode_query[0x1];
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u8 reserved_at_3fa[0x1];
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u8 query_host_net_function_v1[0x1];
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u8 log_max_current_uc_list[0x5];
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u8 general_obj_types[0x40];
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@@ -12704,6 +12705,54 @@ struct mlx5_ifc_host_params_context_bits {
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u8 reserved_at_80[0x180];
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};
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enum mlx5_ifc_vhca_state {
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MLX5_VHCA_STATE_INVALID = 0x0,
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MLX5_VHCA_STATE_ALLOCATED = 0x1,
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MLX5_VHCA_STATE_ACTIVE = 0x2,
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MLX5_VHCA_STATE_IN_USE = 0x3,
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MLX5_VHCA_STATE_TEARDOWN_REQUEST = 0x4,
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};
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enum {
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MLX5_PCI_PF_TYPE_EXTERNAL_HOST_PF = 0x0,
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MLX5_PCI_PF_TYPE_SATELLITE_PF = 0x1,
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};
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struct mlx5_ifc_network_function_params_bits {
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u8 host_number[0x8];
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u8 pci_pf_type[0x4];
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u8 reserved_at_c[0x4];
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u8 pci_num_vfs[0x10];
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u8 pci_total_vfs[0x10];
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u8 pci_bus[0x8];
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u8 pci_device_function[0x8];
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u8 vhca_id[0x10];
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u8 vhca_state[0x4];
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u8 reserved_at_54[0xc];
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u8 reserved_at_60[0xa];
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u8 esw_vport_manual[0x1];
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u8 pci_bus_assigned[0x1];
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u8 pci_vf_info_valid[0x1];
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u8 reserved_at_6d[0x13];
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u8 pci_vf_stride[0x10];
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u8 pci_first_vf_offset[0x10];
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u8 reserved_at_a0[0x160];
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};
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union mlx5_ifc_net_function_params_bits {
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struct mlx5_ifc_host_params_context_bits host_params_context;
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struct mlx5_ifc_network_function_params_bits network_function_params;
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};
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enum {
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MLX5_QUERY_ESW_FUNC_OP_MOD_LAYOUT_V1 = BIT(14),
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};
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struct mlx5_ifc_query_esw_functions_in_bits {
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u8 opcode[0x10];
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u8 reserved_at_10[0x10];
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@@ -12720,11 +12769,16 @@ struct mlx5_ifc_query_esw_functions_out_bits {
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u8 syndrome[0x20];
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u8 reserved_at_40[0x40];
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u8 reserved_at_40[0x20];
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struct mlx5_ifc_host_params_context_bits host_params_context;
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u8 net_function_num[0x8];
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u8 reserved_at_68[0x18];
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u8 reserved_at_280[0x180];
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union {
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u8 reserved_at_80[0x380];
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DECLARE_FLEX_ARRAY(union mlx5_ifc_net_function_params_bits,
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net_function_params);
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};
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};
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struct mlx5_ifc_sf_partition_bits {
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