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Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

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ARM: dts: amlogic updates for v5.12
- add thermal zones with cooling configuration

* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: dts: meson8b: add the thermal-zones with cooling configuration
  ARM: dts: meson8: add the thermal-zones with cooling configuration
  ARM: dts: meson: add the ADC thermal sensor to meson.dtsi
  ARM: dts: meson: move iio-hwmon for the SoC temperature to meson.dtsi

Link: https://lore.kernel.org/r/7ho8h12bto.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2021-02-09 17:48:04 +01:00
parent 638f79778d 9073f694ef
commit 02bb4cb4c4
7 changed files with 120 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
arch/arm/boot/dts/meson.dtsi
View File

@@ -11,6 +11,11 @@ / {
#size-cells = <1>;
interrupt-parent = <&gic>;
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&saradc 8>;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -293,6 +298,13 @@ efuse: nvmem@0 {
};
};
thermal_sensor: thermal-sensor {
compatible = "generic-adc-thermal";
#thermal-sensor-cells = <0>;
io-channels = <&saradc 8>;
io-channel-names = "sensor-channel";
};
xtal: xtal-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;

54
arch/arm/boot/dts/meson8.dtsi
View File

@@ -9,6 +9,7 @@
#include <dt-bindings/power/meson8-power.h>
#include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
#include <dt-bindings/reset/amlogic,meson8b-reset.h>
#include <dt-bindings/thermal/thermal.h>
#include "meson.dtsi"
/ {
@@ -28,6 +29,7 @@ cpu0: cpu@200 {
resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPUCLK>;
#cooling-cells = <2>; /* min followed by max */
};
cpu1: cpu@201 {
@@ -39,6 +41,7 @@ cpu1: cpu@201 {
resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPUCLK>;
#cooling-cells = <2>; /* min followed by max */
};
cpu2: cpu@202 {
@@ -50,6 +53,7 @@ cpu2: cpu@202 {
resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPUCLK>;
#cooling-cells = <2>; /* min followed by max */
};
cpu3: cpu@203 {
@@ -61,6 +65,7 @@ cpu3: cpu@203 {
resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPUCLK>;
#cooling-cells = <2>; /* min followed by max */
};
};
@@ -190,6 +195,54 @@ power-firmware@4f00000 {
};
};
thermal-zones {
soc {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&thermal_sensor>;
cooling-maps {
map0 {
trip = <&soc_passive>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&soc_hot>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
trips {
soc_passive: soc-passive {
temperature = <80000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
soc_hot: soc-hot {
temperature = <90000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "hot";
};
soc_critical: soc-critical {
temperature = <110000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
};
};
mmcbus: bus@c8000000 {
compatible = "simple-bus";
reg = <0xc8000000 0x8000>;
@@ -254,6 +307,7 @@ mali: gpu@c0000 {
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
clock-names = "bus", "core";
operating-points-v2 = <&gpu_opp_table>;
#cooling-cells = <2>; /* min followed by max */
};
};
}; /* end of / */

5
arch/arm/boot/dts/meson8b-ec100.dts
View File

@@ -70,11 +70,6 @@ gpio-poweroff {
timeout-ms = <20000>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&saradc 8>;
};
leds {
compatible = "gpio-leds";

5
arch/arm/boot/dts/meson8b-mxq.dts
View File

@@ -27,11 +27,6 @@ memory {
reg = <0x40000000 0x40000000>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&saradc 8>;
};
vcck: regulator-vcck {
compatible = "pwm-regulator";

5
arch/arm/boot/dts/meson8b-odroidc1.dts
View File

@@ -85,11 +85,6 @@ tf_io: gpio-regulator-tf_io {
1800000 1>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&saradc 8>;
};
rtc32k_xtal: rtc32k-xtal-clk {
/* X3 in the schematics */
compatible = "fixed-clock";

54
arch/arm/boot/dts/meson8b.dtsi
View File

@@ -10,6 +10,7 @@
#include <dt-bindings/power/meson8-power.h>
#include <dt-bindings/reset/amlogic,meson8b-reset.h>
#include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
#include <dt-bindings/thermal/thermal.h>
#include "meson.dtsi"
/ {
@@ -26,6 +27,7 @@ cpu0: cpu@200 {
resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPUCLK>;
#cooling-cells = <2>; /* min followed by max */
};
cpu1: cpu@201 {
@@ -37,6 +39,7 @@ cpu1: cpu@201 {
resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPUCLK>;
#cooling-cells = <2>; /* min followed by max */
};
cpu2: cpu@202 {
@@ -48,6 +51,7 @@ cpu2: cpu@202 {
resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPUCLK>;
#cooling-cells = <2>; /* min followed by max */
};
cpu3: cpu@203 {
@@ -59,6 +63,7 @@ cpu3: cpu@203 {
resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPUCLK>;
#cooling-cells = <2>; /* min followed by max */
};
};
@@ -167,6 +172,54 @@ hwrom@0 {
};
};
thermal-zones {
soc {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&thermal_sensor>;
cooling-maps {
map0 {
trip = <&soc_passive>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&soc_hot>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
trips {
soc_passive: soc-passive {
temperature = <80000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
soc_hot: soc-hot {
temperature = <90000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "hot";
};
soc_critical: soc-critical {
temperature = <110000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
};
};
mmcbus: bus@c8000000 {
compatible = "simple-bus";
reg = <0xc8000000 0x8000>;
@@ -221,6 +274,7 @@ mali: gpu@c0000 {
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
clock-names = "bus", "core";
operating-points-v2 = <&gpu_opp_table>;
#cooling-cells = <2>; /* min followed by max */
};
};
}; /* end of / */

5
arch/arm/boot/dts/meson8m2-mxiii-plus.dts
View File

@@ -45,11 +45,6 @@ button-function {
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&saradc 8>;
};
vcc_3v3: regulator-vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC3V3";