drm/xe/xe3p_lpg: Add missing references to workarounds

Sometimes the same workaround implementation ends up being the
recommended fix different hardware issues, which are tracked by
different workaround lineage numbers.

Some of the Xe3p_LPG workarounds got "dismissed" because the
implementations were already in the driver, however for a different
lineage number.

Even though the implementation for workaround #A is already present in
the driver for workaround #B, it is still important to reference #A in
the driver for tracking purposes.  Without such a reference, we risk
dropping the workaround implementation if, for some reason in the
future, we decide that #B is not necessary anymore while #A is still
required.

As such, add the missing references for Xe3p_LPG.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20260610-add-missing-wa-references-v1-1-0947577238bf@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
This commit is contained in:
Gustavo Sousa
2026-06-10 18:20:47 -03:00
parent 9f89a6de30
commit 02b41333f4

View File

@@ -293,7 +293,7 @@ VISIBLE_IF_KUNIT const struct xe_rtp_table_sr gt_was = XE_RTP_TABLE_SR(
XE_RTP_ACTIONS(SET(MMIOATSREQLIMIT_GAM_WALK_3D,
DIS_ATS_WRONLY_PG))
},
{ XE_RTP_NAME("14026144927, 16029437861"),
{ XE_RTP_NAME("14026144927, 16029437861, 14026127056"),
XE_RTP_RULES(GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0)),
XE_RTP_ACTIONS(SET(L3SQCREG2, L3_SQ_DISABLE_COAMA_2WAY_COH |
L3_SQ_DISABLE_COAMA))
@@ -587,12 +587,12 @@ static const struct xe_rtp_table_sr engine_was = XE_RTP_TABLE_SR(
/* Xe3p_LPG*/
{ XE_RTP_NAME("22021149932"),
{ XE_RTP_NAME("22021149932, 14026290593"),
XE_RTP_RULES(GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0),
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, SAMPLER_LD_LSC_DISABLE))
},
{ XE_RTP_NAME("14025676848"),
{ XE_RTP_NAME("14025676848, 14026270459"),
XE_RTP_RULES(GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0),
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, LSCFE_SAME_ADDRESS_ATOMICS_COALESCING_DISABLE))