mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-09 17:17:04 -04:00
Merge tag 'zynqmp-soc-for-6.11' of https://github.com/Xilinx/linux-xlnx into soc/dt
arm64: Xilinx DT changes for 6.11 - Add remoteproc TCM support - Add coresight cpu debug support - Describe OCM controller - Disable Tri-state for SDIO on kv260 - Add compatibility strings for kv260 overlays - Add support for k26-rev2 SOM - Describe ina260/DP/TTC and PWM on kv260 DT schema alignments and fixes - Align soc-nvmem binding with dt-schema - Fix fpga region node - Add description for efuses - Describe USB wakeup interrupt - Fix ams-pl node * tag 'zynqmp-soc-for-6.11' of https://github.com/Xilinx/linux-xlnx: arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells property arm64: zynqmp: Add support for K26 rev2 boards arm64: zynqmp: Describe DisplayPort connector for Kria arm64: zynqmp: Add description for ina260 on kv260 arm64: zynqmp: Add compatible string for kv260 arm64: zynqmp: Disable Tri-state for SDIO arm64: zynqmp: Remove address/size-cells from ams node arm64: zynqmp: Describe OCM controller arm64: zynqmp: Describe USB wakeup interrupt arm64: zynqmp: Add missing description for efuses arm64: zynqmp: Use fpga-region as node name arm64: zynqmp: Align nvmem node with dt schema arm64: zynqmp: Add coresight cpu debug support dts: zynqmp: add properties for TCM in remoteproc Link: https://lore.kernel.org/r/CAHTX3dLbNAYL4hm+bs=GByA4DqjRr3Rt6WESram8VyU1By8Mow@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
@@ -70,6 +70,22 @@ &cpu0 {
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clocks = <&zynqmp_clk ACPU>;
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};
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&cpu0_debug {
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clocks = <&zynqmp_clk DBF_FPD>;
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};
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&cpu1_debug {
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clocks = <&zynqmp_clk DBF_FPD>;
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};
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&cpu2_debug {
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clocks = <&zynqmp_clk DBF_FPD>;
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};
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&cpu3_debug {
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clocks = <&zynqmp_clk DBF_FPD>;
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};
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&fpd_dma_chan1 {
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clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
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};
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@@ -22,6 +22,17 @@
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/plugin/;
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&{/} {
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compatible = "xlnx,zynqmp-sk-kv260-revA",
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"xlnx,zynqmp-sk-kv260-revY",
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"xlnx,zynqmp-sk-kv260-revZ",
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"xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";
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model = "ZynqMP KV260 revA";
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ina260-u14 {
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compatible = "iio-hwmon";
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io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
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};
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si5332_0: si5332-0 { /* u17 */
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compatible = "fixed-clock";
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#clock-cells = <0>;
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@@ -68,7 +79,12 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
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scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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/* u14 - 0x40 - ina260 */
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u14: ina260@40 { /* u14 */
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compatible = "ti,ina260";
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#io-channel-cells = <1>;
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label = "ina260-u14";
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reg = <0x40>;
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};
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/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
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};
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@@ -321,6 +337,7 @@ conf {
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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bias-disable;
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output-enable;
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};
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conf-cd {
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@@ -17,6 +17,17 @@
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/plugin/;
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&{/} {
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compatible = "xlnx,zynqmp-sk-kv260-rev2",
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"xlnx,zynqmp-sk-kv260-rev1",
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"xlnx,zynqmp-sk-kv260-revB",
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"xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";
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model = "ZynqMP KV260 revB";
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ina260-u14 {
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compatible = "iio-hwmon";
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io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
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};
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si5332_0: si5332-0 { /* u17 */
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compatible = "fixed-clock";
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#clock-cells = <0>;
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@@ -52,6 +63,18 @@ si5332_5: si5332-5 { /* u17 */
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#clock-cells = <0>;
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clock-frequency = <27000000>;
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};
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dpcon {
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compatible = "dp-connector";
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label = "P11";
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type = "full-size";
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port {
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dpcon_in: endpoint {
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remote-endpoint = <&dpsub_dp_out>;
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};
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};
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};
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};
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&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
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@@ -63,8 +86,13 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
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scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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/* u14 - 0x40 - ina260 */
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/* u43 - 0x2d - usb5744 */
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u14: ina260@40 { /* u14 */
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compatible = "ti,ina260";
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#io-channel-cells = <1>;
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label = "ina260-u14";
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reg = <0x40>;
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};
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/* u43 - 0x2d - USB hub */
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/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
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};
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@@ -81,6 +109,14 @@ &zynqmp_dpsub {
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phy-names = "dp-phy0", "dp-phy1";
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phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
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assigned-clock-rates = <27000000>, <25000000>, <300000000>;
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ports {
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port@5 {
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dpsub_dp_out: endpoint {
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remote-endpoint = <&dpcon_in>;
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};
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};
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};
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};
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&zynqmp_dpdma {
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@@ -305,6 +341,7 @@ conf {
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slew-rate = <SLEW_RATE_SLOW>;
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power-source = <IO_STANDARD_LVCMOS18>;
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bias-disable;
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output-enable;
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};
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conf-cd {
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@@ -1,8 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* dts file for Xilinx ZynqMP SM-K26 rev1/B/A
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* dts file for Xilinx ZynqMP SM-K26 rev2/1/B/A
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*
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* (C) Copyright 2020 - 2021, Xilinx, Inc.
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* (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc.
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*
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* Michal Simek <michal.simek@amd.com>
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*/
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@@ -17,8 +18,9 @@
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#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
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/ {
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model = "ZynqMP SM-K26 Rev1/B/A";
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compatible = "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB",
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model = "ZynqMP SM-K26 Rev2/1/B/A";
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compatible = "xlnx,zynqmp-sm-k26-rev2",
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"xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB",
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"xlnx,zynqmp-sm-k26-revA", "xlnx,zynqmp-sm-k26",
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"xlnx,zynqmp";
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@@ -101,12 +103,23 @@ ams {
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<&xilinx_ams 24>, <&xilinx_ams 25>, <&xilinx_ams 26>,
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<&xilinx_ams 27>, <&xilinx_ams 28>, <&xilinx_ams 29>;
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};
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pwm-fan {
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compatible = "pwm-fan";
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status = "okay";
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pwms = <&ttc0 2 40000 0>;
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};
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};
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&modepin_gpio {
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label = "modepin";
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};
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&ttc0 {
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status = "okay";
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#pwm-cells = <3>;
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};
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&uart1 { /* MIO36/MIO37 */
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status = "okay";
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};
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@@ -1,8 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* dts file for Xilinx ZynqMP SMK-K26 rev1/B/A
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* dts file for Xilinx ZynqMP SMK-K26 rev2/1/B/A
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*
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* (C) Copyright 2020 - 2021, Xilinx, Inc.
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* (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc.
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*
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* Michal Simek <michal.simek@amd.com>
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*/
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@@ -10,8 +11,9 @@
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#include "zynqmp-sm-k26-revA.dts"
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/ {
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model = "ZynqMP SMK-K26 Rev1/B/A";
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compatible = "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB",
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model = "ZynqMP SMK-K26 Rev2/1/B/A";
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compatible = "xlnx,zynqmp-smk-k26-rev2",
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"xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB",
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"xlnx,zynqmp-smk-k26-revA", "xlnx,zynqmp-smk-k26",
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"xlnx,zynqmp";
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};
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@@ -14,6 +14,14 @@ / {
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compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
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};
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&rproc_split {
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status = "okay";
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};
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&rproc_lockstep {
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status = "disabled";
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};
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&eeprom {
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -207,13 +207,71 @@ zynqmp_power: power-management {
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mbox-names = "tx", "rx";
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};
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nvmem-firmware {
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soc-nvmem {
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compatible = "xlnx,zynqmp-nvmem-fw";
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#address-cells = <1>;
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#size-cells = <1>;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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soc_revision: soc-revision@0 {
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reg = <0x0 0x4>;
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soc_revision: soc-revision@0 {
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reg = <0x0 0x4>;
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};
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/* efuse access */
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efuse_dna: efuse-dna@c {
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reg = <0xc 0xc>;
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};
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efuse_usr0: efuse-usr0@20 {
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reg = <0x20 0x4>;
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};
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efuse_usr1: efuse-usr1@24 {
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reg = <0x24 0x4>;
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};
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efuse_usr2: efuse-usr2@28 {
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reg = <0x28 0x4>;
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};
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efuse_usr3: efuse-usr3@2c {
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reg = <0x2c 0x4>;
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};
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efuse_usr4: efuse-usr4@30 {
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reg = <0x30 0x4>;
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};
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efuse_usr5: efuse-usr5@34 {
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reg = <0x34 0x4>;
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};
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efuse_usr6: efuse-usr6@38 {
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reg = <0x38 0x4>;
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};
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efuse_usr7: efuse-usr7@3c {
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reg = <0x3c 0x4>;
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};
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efuse_miscusr: efuse-miscusr@40 {
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reg = <0x40 0x4>;
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};
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efuse_chash: efuse-chash@50 {
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reg = <0x50 0x4>;
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};
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efuse_pufmisc: efuse-pufmisc@54 {
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reg = <0x54 0x4>;
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};
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efuse_sec: efuse-sec@58 {
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reg = <0x58 0x4>;
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};
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efuse_spkid: efuse-spkid@5c {
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reg = <0x5c 0x4>;
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};
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efuse_aeskey: efuse-aeskey@60 {
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reg = <0x60 0x20>;
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};
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efuse_ppk0hash: efuse-ppk0hash@a0 {
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reg = <0xa0 0x30>;
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};
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efuse_ppk1hash: efuse-ppk1hash@d0 {
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reg = <0xd0 0x30>;
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};
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efuse_pufuser: efuse-pufuser@100 {
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reg = <0x100 0x7F>;
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};
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};
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};
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@@ -252,7 +310,7 @@ timer {
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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fpga_full: fpga-full {
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fpga_full: fpga-region {
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compatible = "fpga-region";
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fpga-mgr = <&zynqmp_pcap>;
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#address-cells = <2>;
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@@ -260,19 +318,76 @@ fpga_full: fpga-full {
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ranges;
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};
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remoteproc {
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rproc_lockstep: remoteproc@ffe00000 {
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compatible = "xlnx,zynqmp-r5fss";
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xlnx,cluster-mode = <1>;
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xlnx,tcm-mode = <1>;
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r5f-0 {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
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<0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
|
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<0x0 0x10000 0x0 0xffe10000 0x0 0x10000>,
|
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<0x0 0x30000 0x0 0xffe30000 0x0 0x10000>;
|
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|
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r5f@0 {
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compatible = "xlnx,zynqmp-r5f";
|
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power-domains = <&zynqmp_firmware PD_RPU_0>;
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reg = <0x0 0x0 0x0 0x10000>,
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<0x0 0x20000 0x0 0x10000>,
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<0x0 0x10000 0x0 0x10000>,
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<0x0 0x30000 0x0 0x10000>;
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reg-names = "atcm0", "btcm0", "atcm1", "btcm1";
|
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power-domains = <&zynqmp_firmware PD_RPU_0>,
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<&zynqmp_firmware PD_R5_0_ATCM>,
|
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<&zynqmp_firmware PD_R5_0_BTCM>,
|
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<&zynqmp_firmware PD_R5_1_ATCM>,
|
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<&zynqmp_firmware PD_R5_1_BTCM>;
|
||||
memory-region = <&rproc_0_fw_image>;
|
||||
};
|
||||
|
||||
r5f-1 {
|
||||
r5f@1 {
|
||||
compatible = "xlnx,zynqmp-r5f";
|
||||
power-domains = <&zynqmp_firmware PD_RPU_1>;
|
||||
reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
|
||||
reg-names = "atcm0", "btcm0";
|
||||
power-domains = <&zynqmp_firmware PD_RPU_1>,
|
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<&zynqmp_firmware PD_R5_1_ATCM>,
|
||||
<&zynqmp_firmware PD_R5_1_BTCM>;
|
||||
memory-region = <&rproc_1_fw_image>;
|
||||
};
|
||||
};
|
||||
|
||||
rproc_split: remoteproc-split@ffe00000 {
|
||||
status = "disabled";
|
||||
compatible = "xlnx,zynqmp-r5fss";
|
||||
xlnx,cluster-mode = <0>;
|
||||
xlnx,tcm-mode = <0>;
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
|
||||
<0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
|
||||
<0x1 0x0 0x0 0xffe90000 0x0 0x10000>,
|
||||
<0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>;
|
||||
|
||||
r5f@0 {
|
||||
compatible = "xlnx,zynqmp-r5f";
|
||||
reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>;
|
||||
reg-names = "atcm0", "btcm0";
|
||||
power-domains = <&zynqmp_firmware PD_RPU_0>,
|
||||
<&zynqmp_firmware PD_R5_0_ATCM>,
|
||||
<&zynqmp_firmware PD_R5_0_BTCM>;
|
||||
memory-region = <&rproc_0_fw_image>;
|
||||
};
|
||||
|
||||
r5f@1 {
|
||||
compatible = "xlnx,zynqmp-r5f";
|
||||
reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
|
||||
reg-names = "atcm0", "btcm0";
|
||||
power-domains = <&zynqmp_firmware PD_RPU_1>,
|
||||
<&zynqmp_firmware PD_R5_1_ATCM>,
|
||||
<&zynqmp_firmware PD_R5_1_BTCM>;
|
||||
memory-region = <&rproc_1_fw_image>;
|
||||
};
|
||||
};
|
||||
@@ -330,6 +445,34 @@ pmu@9000 {
|
||||
};
|
||||
};
|
||||
|
||||
cpu0_debug: debug@fec10000 {
|
||||
compatible = "arm,coresight-cpu-debug", "arm,primecell";
|
||||
reg = <0x0 0xfec10000 0x0 0x1000>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&cpu0>;
|
||||
};
|
||||
|
||||
cpu1_debug: debug@fed10000 {
|
||||
compatible = "arm,coresight-cpu-debug", "arm,primecell";
|
||||
reg = <0x0 0xfed10000 0x0 0x1000>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&cpu1>;
|
||||
};
|
||||
|
||||
cpu2_debug: debug@fee10000 {
|
||||
compatible = "arm,coresight-cpu-debug", "arm,primecell";
|
||||
reg = <0x0 0xfee10000 0x0 0x1000>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&cpu2>;
|
||||
};
|
||||
|
||||
cpu3_debug: debug@fef10000 {
|
||||
compatible = "arm,coresight-cpu-debug", "arm,primecell";
|
||||
reg = <0x0 0xfef10000 0x0 0x1000>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&cpu3>;
|
||||
};
|
||||
|
||||
/* GDMA */
|
||||
fpd_dma_chan1: dma-controller@fd500000 {
|
||||
status = "disabled";
|
||||
@@ -684,6 +827,13 @@ i2c1: i2c@ff030000 {
|
||||
power-domains = <&zynqmp_firmware PD_I2C_1>;
|
||||
};
|
||||
|
||||
ocm: memory-controller@ff960000 {
|
||||
compatible = "xlnx,zynqmp-ocmc-1.0";
|
||||
reg = <0x0 0xff960000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pcie: pcie@fd0e0000 {
|
||||
compatible = "xlnx,nwl-pcie-2.11";
|
||||
status = "disabled";
|
||||
@@ -941,10 +1091,11 @@ dwc3_0: usb@fe200000 {
|
||||
status = "disabled";
|
||||
reg = <0x0 0xfe200000 0x0 0x40000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupt-names = "host", "peripheral", "otg";
|
||||
interrupt-names = "host", "peripheral", "otg", "wakeup";
|
||||
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "ref";
|
||||
/* iommus = <&smmu 0x860>; */
|
||||
snps,quirk-frame-length-adjustment = <0x20>;
|
||||
@@ -972,10 +1123,11 @@ dwc3_1: usb@fe300000 {
|
||||
status = "disabled";
|
||||
reg = <0x0 0xfe300000 0x0 0x40000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupt-names = "host", "peripheral", "otg";
|
||||
interrupt-names = "host", "peripheral", "otg", "wakeup";
|
||||
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
|
||||
<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "ref";
|
||||
/* iommus = <&smmu 0x861>; */
|
||||
snps,quirk-frame-length-adjustment = <0x20>;
|
||||
@@ -1024,8 +1176,6 @@ ams_pl: ams-pl@400 {
|
||||
compatible = "xlnx,zynqmp-ams-pl";
|
||||
status = "disabled";
|
||||
reg = <0x400 0x400>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
Reference in New Issue
Block a user