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ARM: dts: rockchip: add cpu-core resets for rk3188

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Specify the reset handles for each cpu core.

Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
This commit is contained in:
Heiko Stuebner
2018-11-07 17:12:24 +01:00
committed by Heiko Stuebner
parent abcee7a863
commit 0222aac448
1 changed files with 4 additions and 0 deletions
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4
arch/arm/boot/dts/rk3188.dtsi
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@@ -26,6 +26,7 @@ cpu0: cpu@0 {
clock-latency = <40000>;
clocks = <&cru ARMCLK>;
operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE0>;
};
cpu@1 {
device_type = "cpu";
@@ -33,6 +34,7 @@ cpu@1 {
next-level-cache = <&L2>;
reg = <0x1>;
operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE1>;
};
cpu@2 {
device_type = "cpu";
@@ -40,6 +42,7 @@ cpu@2 {
next-level-cache = <&L2>;
reg = <0x2>;
operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE2>;
};
cpu@3 {
device_type = "cpu";
@@ -47,6 +50,7 @@ cpu@3 {
next-level-cache = <&L2>;
reg = <0x3>;
operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE3>;
};
};