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drm/msm/dpu: drop the `smart_dma_priority' field from struct dpu_sspp_sub_blks

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In preparation to deduplicating SSPP subblocks, drop the (unused)
`smart_dma_priority' field from struct dpu_sspp_sub_blks. If it is
needed later (e.g. for SmartDMA v1), it should be added to the SSPP
declarations themselves.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/570103/
Link: https://lore.kernel.org/r/20231201234234.2065610-6-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov
2023-12-02 01:40:29 +02:00
parent 6876059d7e
commit 01fc6c012f
2 changed files with 40 additions and 74 deletions
Download Patch File Download Diff File Expand all files Collapse all files

112
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
View File

@@ -252,11 +252,10 @@ static const uint32_t wb2_formats[] = {
#define SSPP_SCALER_VER(maj, min) (((maj) << 16) | (min))
/* SSPP common configuration */
#define _VIG_SBLK(sdma_pri, scaler_ver) \
#define _VIG_SBLK(scaler_ver) \
{ \
.maxdwnscale = MAX_DOWNSCALE_RATIO, \
.maxupscale = MAX_UPSCALE_RATIO, \
.smart_dma_priority = sdma_pri, \
.scaler_blk = {.name = "scaler", \
.version = scaler_ver, \
.base = 0xa00, .len = 0xa0,}, \
@@ -269,11 +268,10 @@ static const uint32_t wb2_formats[] = {
.rotation_cfg = NULL, \
}
#define _VIG_SBLK_ROT(sdma_pri, scaler_ver, rot_cfg) \
#define _VIG_SBLK_ROT(scaler_ver, rot_cfg) \
{ \
.maxdwnscale = MAX_DOWNSCALE_RATIO, \
.maxupscale = MAX_UPSCALE_RATIO, \
.smart_dma_priority = sdma_pri, \
.scaler_blk = {.name = "scaler", \
.version = scaler_ver, \
.base = 0xa00, .len = 0xa0,}, \
@@ -286,11 +284,10 @@ static const uint32_t wb2_formats[] = {
.rotation_cfg = rot_cfg, \
}
#define _DMA_SBLK(sdma_pri) \
#define _DMA_SBLK() \
{ \
.maxdwnscale = SSPP_UNITY_SCALE, \
.maxupscale = SSPP_UNITY_SCALE, \
.smart_dma_priority = sdma_pri, \
.format_list = plane_formats, \
.num_formats = ARRAY_SIZE(plane_formats), \
.virt_format_list = plane_formats, \
@@ -298,17 +295,13 @@ static const uint32_t wb2_formats[] = {
}
static const struct dpu_sspp_sub_blks msm8998_vig_sblk_0 =
_VIG_SBLK(0,
SSPP_SCALER_VER(1, 2));
_VIG_SBLK(SSPP_SCALER_VER(1, 2));
static const struct dpu_sspp_sub_blks msm8998_vig_sblk_1 =
_VIG_SBLK(0,
SSPP_SCALER_VER(1, 2));
_VIG_SBLK(SSPP_SCALER_VER(1, 2));
static const struct dpu_sspp_sub_blks msm8998_vig_sblk_2 =
_VIG_SBLK(0,
SSPP_SCALER_VER(1, 2));
_VIG_SBLK(SSPP_SCALER_VER(1, 2));
static const struct dpu_sspp_sub_blks msm8998_vig_sblk_3 =
_VIG_SBLK(0,
SSPP_SCALER_VER(1, 2));
_VIG_SBLK(SSPP_SCALER_VER(1, 2));
static const struct dpu_rotation_cfg dpu_rot_sc7280_cfg_v2 = {
.rot_maxheight = 1088,
@@ -317,107 +310,82 @@ static const struct dpu_rotation_cfg dpu_rot_sc7280_cfg_v2 = {
};
static const struct dpu_sspp_sub_blks sdm845_vig_sblk_0 =
_VIG_SBLK(5,
SSPP_SCALER_VER(1, 3));
_VIG_SBLK(SSPP_SCALER_VER(1, 3));
static const struct dpu_sspp_sub_blks sdm845_vig_sblk_1 =
_VIG_SBLK(6,
SSPP_SCALER_VER(1, 3));
_VIG_SBLK(SSPP_SCALER_VER(1, 3));
static const struct dpu_sspp_sub_blks sdm845_vig_sblk_2 =
_VIG_SBLK(7,
SSPP_SCALER_VER(1, 3));
_VIG_SBLK(SSPP_SCALER_VER(1, 3));
static const struct dpu_sspp_sub_blks sdm845_vig_sblk_3 =
_VIG_SBLK(8,
SSPP_SCALER_VER(1, 3));
_VIG_SBLK(SSPP_SCALER_VER(1, 3));
static const struct dpu_sspp_sub_blks sm8150_vig_sblk_0 =
_VIG_SBLK(5,
SSPP_SCALER_VER(1, 4));
_VIG_SBLK(SSPP_SCALER_VER(1, 4));
static const struct dpu_sspp_sub_blks sm8150_vig_sblk_1 =
_VIG_SBLK(6,
SSPP_SCALER_VER(1, 4));
_VIG_SBLK(SSPP_SCALER_VER(1, 4));
static const struct dpu_sspp_sub_blks sm8150_vig_sblk_2 =
_VIG_SBLK(7,
SSPP_SCALER_VER(1, 4));
_VIG_SBLK(SSPP_SCALER_VER(1, 4));
static const struct dpu_sspp_sub_blks sm8150_vig_sblk_3 =
_VIG_SBLK(8,
SSPP_SCALER_VER(1, 4));
_VIG_SBLK(SSPP_SCALER_VER(1, 4));
static const struct dpu_sspp_sub_blks sdm845_dma_sblk_0 = _DMA_SBLK(1);
static const struct dpu_sspp_sub_blks sdm845_dma_sblk_1 = _DMA_SBLK(2);
static const struct dpu_sspp_sub_blks sdm845_dma_sblk_2 = _DMA_SBLK(3);
static const struct dpu_sspp_sub_blks sdm845_dma_sblk_3 = _DMA_SBLK(4);
static const struct dpu_sspp_sub_blks sdm845_dma_sblk_0 = _DMA_SBLK();
static const struct dpu_sspp_sub_blks sdm845_dma_sblk_1 = _DMA_SBLK();
static const struct dpu_sspp_sub_blks sdm845_dma_sblk_2 = _DMA_SBLK();
static const struct dpu_sspp_sub_blks sdm845_dma_sblk_3 = _DMA_SBLK();
static const struct dpu_sspp_sub_blks sc7180_vig_sblk_0 =
_VIG_SBLK(4,
SSPP_SCALER_VER(3, 0));
_VIG_SBLK(SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sc7280_vig_sblk_0 =
_VIG_SBLK_ROT(4,
SSPP_SCALER_VER(3, 0),
_VIG_SBLK_ROT(SSPP_SCALER_VER(3, 0),
&dpu_rot_sc7280_cfg_v2);
static const struct dpu_sspp_sub_blks sm6115_vig_sblk_0 =
_VIG_SBLK(2,
SSPP_SCALER_VER(3, 0));
_VIG_SBLK(SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sm6125_vig_sblk_0 =
_VIG_SBLK(3,
SSPP_SCALER_VER(2, 4));
_VIG_SBLK(SSPP_SCALER_VER(2, 4));
static const struct dpu_sspp_sub_blks sm8250_vig_sblk_0 =
_VIG_SBLK(5,
SSPP_SCALER_VER(3, 0));
_VIG_SBLK(SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sm8250_vig_sblk_1 =
_VIG_SBLK(6,
SSPP_SCALER_VER(3, 0));
_VIG_SBLK(SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sm8250_vig_sblk_2 =
_VIG_SBLK(7,
SSPP_SCALER_VER(3, 0));
_VIG_SBLK(SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sm8250_vig_sblk_3 =
_VIG_SBLK(8,
SSPP_SCALER_VER(3, 0));
_VIG_SBLK(SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sm8450_vig_sblk_0 =
_VIG_SBLK(5,
SSPP_SCALER_VER(3, 1));
_VIG_SBLK(SSPP_SCALER_VER(3, 1));
static const struct dpu_sspp_sub_blks sm8450_vig_sblk_1 =
_VIG_SBLK(6,
SSPP_SCALER_VER(3, 1));
_VIG_SBLK(SSPP_SCALER_VER(3, 1));
static const struct dpu_sspp_sub_blks sm8450_vig_sblk_2 =
_VIG_SBLK(7,
SSPP_SCALER_VER(3, 1));
_VIG_SBLK(SSPP_SCALER_VER(3, 1));
static const struct dpu_sspp_sub_blks sm8450_vig_sblk_3 =
_VIG_SBLK(8,
SSPP_SCALER_VER(3, 1));
_VIG_SBLK(SSPP_SCALER_VER(3, 1));
static const struct dpu_sspp_sub_blks sm8550_vig_sblk_0 =
_VIG_SBLK(7,
SSPP_SCALER_VER(3, 2));
_VIG_SBLK(SSPP_SCALER_VER(3, 2));
static const struct dpu_sspp_sub_blks sm8550_vig_sblk_1 =
_VIG_SBLK(8,
SSPP_SCALER_VER(3, 2));
_VIG_SBLK(SSPP_SCALER_VER(3, 2));
static const struct dpu_sspp_sub_blks sm8550_vig_sblk_2 =
_VIG_SBLK(9,
SSPP_SCALER_VER(3, 2));
_VIG_SBLK(SSPP_SCALER_VER(3, 2));
static const struct dpu_sspp_sub_blks sm8550_vig_sblk_3 =
_VIG_SBLK(10,
SSPP_SCALER_VER(3, 2));
static const struct dpu_sspp_sub_blks sm8550_dma_sblk_4 = _DMA_SBLK(5);
static const struct dpu_sspp_sub_blks sm8550_dma_sblk_5 = _DMA_SBLK(6);
_VIG_SBLK(SSPP_SCALER_VER(3, 2));
static const struct dpu_sspp_sub_blks sm8550_dma_sblk_4 = _DMA_SBLK();
static const struct dpu_sspp_sub_blks sm8550_dma_sblk_5 = _DMA_SBLK();
#define _VIG_SBLK_NOSCALE(sdma_pri) \
#define _VIG_SBLK_NOSCALE() \
{ \
.maxdwnscale = SSPP_UNITY_SCALE, \
.maxupscale = SSPP_UNITY_SCALE, \
.smart_dma_priority = sdma_pri, \
.format_list = plane_formats_yuv, \
.num_formats = ARRAY_SIZE(plane_formats_yuv), \
.virt_format_list = plane_formats, \
.virt_num_formats = ARRAY_SIZE(plane_formats), \
}
static const struct dpu_sspp_sub_blks qcm2290_vig_sblk_0 = _VIG_SBLK_NOSCALE(2);
static const struct dpu_sspp_sub_blks qcm2290_dma_sblk_0 = _DMA_SBLK(1);
static const struct dpu_sspp_sub_blks qcm2290_vig_sblk_0 = _VIG_SBLK_NOSCALE();
static const struct dpu_sspp_sub_blks qcm2290_dma_sblk_0 = _DMA_SBLK();
/*************************************************************
* MIXER sub blocks config

2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
View File

@@ -368,7 +368,6 @@ struct dpu_caps {
* common: Pointer to common configurations shared by sub blocks
* @maxdwnscale: max downscale ratio supported(without DECIMATION)
* @maxupscale: maxupscale ratio supported
* @smart_dma_priority: hw priority of rect1 of multirect pipe
* @max_per_pipe_bw: maximum allowable bandwidth of this pipe in kBps
* @qseed_ver: qseed version
* @scaler_blk:
@@ -382,7 +381,6 @@ struct dpu_caps {
struct dpu_sspp_sub_blks {
u32 maxdwnscale;
u32 maxupscale;
u32 smart_dma_priority;
u32 max_per_pipe_bw;
u32 qseed_ver;
struct dpu_scaler_blk scaler_blk;