mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-02-24 04:15:07 -05:00
Merge tag 'mvebu-dt-6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt for 6.1 (part 1) Add definitions for PCIe legacy INTx interrupts for dts using pci-mvebu.c controller driver. Add gpio-ranges for pin muxing for Armada 38x Add audio support for Armada 38x Turris-omnia (Armada 385 based) fix a pin name lsxl (kirkwood based) - Fix fix serial line - Remove first ethernet port * tag 'mvebu-dt-6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: (22 commits) ARM: dts: turris-omnia: Add label for wan port ARM: dts: turris-omnia: Define S/PDIF audio card ARM: mvebu: Add spdif-pins mpp pins for Armada 38x ARM: mvebu: add audio support to Armada 385 DB ARM: mvebu: add audio I2S controller to Armada 38x Device Tree ARM: dts: armada-38x: Add gpio-ranges for pin muxing ARM: dts: dove: Add definitions for PCIe error interrupts ARM: dts: kirkwood: Add definitions for PCIe error interrupts ARM: dts: armada-39x.dtsi: Add definitions for PCIe legacy INTx interrupts ARM: dts: armada-380.dtsi: Add definitions for PCIe legacy INTx interrupts ARM: dts: armada-375.dtsi: Add definitions for PCIe legacy INTx interrupts ARM: dts: armada-xp-mv78460.dtsi: Add definitions for PCIe legacy INTx interrupts ARM: dts: armada-xp-mv78260.dtsi: Add definitions for PCIe legacy INTx interrupts ARM: dts: armada-xp-mv78230.dtsi: Add definitions for PCIe legacy INTx interrupts ARM: dts: armada-xp-98dx3236.dtsi: Add definitions for PCIe legacy INTx interrupts ARM: dts: armada-370.dtsi: Add definitions for PCIe legacy INTx interrupts ARM: dts: dove: Add definitions for PCIe legacy INTx interrupts ARM: dts: kirkwood: Add definitions for PCIe legacy INTx interrupts ARM: dts: kirkwood: lsxl: remove first ethernet port ARM: dts: kirkwood: lsxl: fix serial line ... Link: https://lore.kernel.org/r/87edw2xfle.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
@@ -60,16 +60,26 @@ pcie0: pcie@1,0 {
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupt-names = "intx";
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interrupts-extended = <&mpic 58>;
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#interrupt-cells = <1>;
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ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
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0x81000000 0 0 0x81000000 0x1 0 1 0>;
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bus-range = <0x00 0xff>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &mpic 58>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie0_intc 0>,
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<0 0 0 2 &pcie0_intc 1>,
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<0 0 0 3 &pcie0_intc 2>,
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<0 0 0 4 &pcie0_intc 3>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <0>;
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clocks = <&gateclk 5>;
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status = "disabled";
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pcie0_intc: interrupt-controller {
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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pcie2: pcie@2,0 {
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@@ -78,16 +88,26 @@ pcie2: pcie@2,0 {
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reg = <0x1000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupt-names = "intx";
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interrupts-extended = <&mpic 62>;
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#interrupt-cells = <1>;
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ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
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0x81000000 0 0 0x81000000 0x2 0 1 0>;
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bus-range = <0x00 0xff>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &mpic 62>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie2_intc 0>,
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<0 0 0 2 &pcie2_intc 1>,
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<0 0 0 3 &pcie2_intc 2>,
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<0 0 0 4 &pcie2_intc 3>;
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marvell,pcie-port = <1>;
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marvell,pcie-lane = <0>;
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clocks = <&gateclk 9>;
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status = "disabled";
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pcie2_intc: interrupt-controller {
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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};
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@@ -568,16 +568,26 @@ pcie0: pcie@1,0 {
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupt-names = "intx";
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interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <1>;
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ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
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0x81000000 0 0 0x81000000 0x1 0 1 0>;
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bus-range = <0x00 0xff>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie0_intc 0>,
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<0 0 0 2 &pcie0_intc 1>,
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<0 0 0 3 &pcie0_intc 2>,
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<0 0 0 4 &pcie0_intc 3>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <0>;
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clocks = <&gateclk 5>;
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status = "disabled";
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pcie0_intc: interrupt-controller {
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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pcie1: pcie@2,0 {
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@@ -586,16 +596,26 @@ pcie1: pcie@2,0 {
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reg = <0x1000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupt-names = "intx";
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interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <1>;
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ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
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0x81000000 0 0 0x81000000 0x2 0 1 0>;
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bus-range = <0x00 0xff>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie1_intc 0>,
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<0 0 0 2 &pcie1_intc 1>,
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<0 0 0 3 &pcie1_intc 2>,
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<0 0 0 4 &pcie1_intc 3>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <1>;
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clocks = <&gateclk 6>;
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status = "disabled";
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pcie1_intc: interrupt-controller {
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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};
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@@ -64,16 +64,26 @@ pcie@1,0 {
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupt-names = "intx";
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interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <1>;
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ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
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0x81000000 0 0 0x81000000 0x1 0 1 0>;
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bus-range = <0x00 0xff>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie1_intc 0>,
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<0 0 0 2 &pcie1_intc 1>,
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<0 0 0 3 &pcie1_intc 2>,
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<0 0 0 4 &pcie1_intc 3>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <0>;
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clocks = <&gateclk 8>;
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status = "disabled";
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pcie1_intc: interrupt-controller {
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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/* x1 port */
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@@ -83,16 +93,26 @@ pcie@2,0 {
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reg = <0x1000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupt-names = "intx";
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interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <1>;
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ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
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0x81000000 0 0 0x81000000 0x2 0 1 0>;
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bus-range = <0x00 0xff>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie2_intc 0>,
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<0 0 0 2 &pcie2_intc 1>,
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<0 0 0 3 &pcie2_intc 2>,
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<0 0 0 4 &pcie2_intc 3>;
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marvell,pcie-port = <1>;
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marvell,pcie-lane = <0>;
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clocks = <&gateclk 5>;
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status = "disabled";
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pcie2_intc: interrupt-controller {
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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/* x1 port */
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@@ -102,16 +122,26 @@ pcie@3,0 {
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reg = <0x1800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupt-names = "intx";
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interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <1>;
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ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
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0x81000000 0 0 0x81000000 0x3 0 1 0>;
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bus-range = <0x00 0xff>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie3_intc 0>,
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<0 0 0 2 &pcie3_intc 1>,
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<0 0 0 3 &pcie3_intc 2>,
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<0 0 0 4 &pcie3_intc 3>;
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marvell,pcie-port = <2>;
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marvell,pcie-lane = <0>;
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clocks = <&gateclk 6>;
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status = "disabled";
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pcie3_intc: interrupt-controller {
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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};
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};
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@@ -105,6 +105,33 @@ sfp: sfp {
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*/
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status = "disabled";
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "SPDIF";
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simple-audio-card,format = "i2s";
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simple-audio-card,cpu {
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sound-dai = <&audio_controller 1>;
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};
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simple-audio-card,codec {
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sound-dai = <&spdif_out>;
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};
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};
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spdif_out: spdif-out {
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#sound-dai-cells = <0>;
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compatible = "linux,spdif-dit";
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};
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};
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&audio_controller {
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/* Pin header U16, GPIO51 in SPDIFO mode */
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pinctrl-0 = <&spdif_pins>;
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pinctrl-names = "default";
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spdif-mode;
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status = "okay";
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};
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&bm {
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@@ -166,6 +193,7 @@ ð2 {
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buffer-manager = <&bm>;
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bm,pool-long = <2>;
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bm,pool-short = <3>;
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label = "wan";
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};
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&i2c0 {
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@@ -476,7 +504,7 @@ spi0cs0_pins: spi0cs0-pins {
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marvell,function = "spi0";
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};
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spi0cs1_pins: spi0cs1-pins {
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spi0cs2_pins: spi0cs2-pins {
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marvell,pins = "mpp26";
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marvell,function = "spi0";
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};
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@@ -511,7 +539,7 @@ partition@100000 {
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};
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};
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/* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
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/* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
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};
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&uart0 {
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@@ -36,6 +36,11 @@ internal-regs {
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i2c@11000 {
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status = "okay";
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clock-frequency = <100000>;
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audio_codec: audio-codec@4a {
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#sound-dai-cells = <0>;
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compatible = "cirrus,cs42l51";
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reg = <0x4a>;
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};
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};
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i2c@11100 {
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@@ -99,6 +104,12 @@ sdhci@d8000 {
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no-1-8-v;
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};
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audio-controller@e8000 {
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pinctrl-0 = <&i2s_pins>;
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pinctrl-names = "default";
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status = "disabled";
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};
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usb3@f0000 {
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status = "okay";
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};
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@@ -128,6 +139,64 @@ pcie@2,0 {
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};
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};
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "Armada 385 DB Audio";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,widgets =
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"Headphone", "Out Jack",
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"Line", "In Jack";
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simple-audio-card,routing =
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"Out Jack", "HPL",
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"Out Jack", "HPR",
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"AIN1L", "In Jack",
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"AIN1R", "In Jack";
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status = "disabled";
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simple-audio-card,dai-link@0 {
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format = "i2s";
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cpu {
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sound-dai = <&audio_controller 0>;
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};
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codec {
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sound-dai = <&audio_codec>;
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};
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};
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simple-audio-card,dai-link@1 {
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format = "i2s";
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cpu {
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sound-dai = <&audio_controller 1>;
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};
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codec {
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sound-dai = <&spdif_out>;
|
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};
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};
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simple-audio-card,dai-link@2 {
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format = "i2s";
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cpu {
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sound-dai = <&audio_controller 1>;
|
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};
|
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codec {
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sound-dai = <&spdif_in>;
|
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};
|
||||
};
|
||||
};
|
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spdif_out: spdif-out {
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#sound-dai-cells = <0>;
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compatible = "linux,spdif-dit";
|
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};
|
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spdif_in: spdif-in {
|
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#sound-dai-cells = <0>;
|
||||
compatible = "linux,spdif-dir";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
|
||||
@@ -289,6 +289,18 @@ sata3_pins: sata-pins-3 {
|
||||
marvell,pins = "mpp44";
|
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marvell,function = "sata3";
|
||||
};
|
||||
|
||||
i2s_pins: i2s-pins {
|
||||
marvell,pins = "mpp48", "mpp49",
|
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"mpp50", "mpp51",
|
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"mpp52", "mpp53";
|
||||
marvell,function = "audio";
|
||||
};
|
||||
|
||||
spdif_pins: spdif-pins {
|
||||
marvell,pins = "mpp51";
|
||||
marvell,function = "audio";
|
||||
};
|
||||
};
|
||||
|
||||
gpio0: gpio@18100 {
|
||||
@@ -298,6 +310,7 @@ gpio0: gpio@18100 {
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pinctrl 0 0 32>;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
@@ -316,6 +329,7 @@ gpio1: gpio@18140 {
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <28>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pinctrl 0 32 28>;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
@@ -618,6 +632,18 @@ sdhci: sdhci@d8000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
audio_controller: audio-controller@e8000 {
|
||||
#sound-dai-cells = <1>;
|
||||
compatible = "marvell,armada-380-audio";
|
||||
reg = <0xe8000 0x4000>, <0x18410 0xc>,
|
||||
<0x18204 0x4>;
|
||||
reg-names = "i2s_regs", "pll_regs", "soc_ctrl";
|
||||
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gateclk 0>;
|
||||
clock-names = "internal";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb3_0: usb3@f0000 {
|
||||
compatible = "marvell,armada-380-xhci";
|
||||
reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
|
||||
|
||||
@@ -438,16 +438,26 @@ pcie@1,0 {
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x1 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
|
||||
<0 0 0 2 &pcie1_intc 1>,
|
||||
<0 0 0 3 &pcie1_intc 2>,
|
||||
<0 0 0 4 &pcie1_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 8>;
|
||||
status = "disabled";
|
||||
|
||||
pcie1_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/* x1 port */
|
||||
@@ -457,16 +467,26 @@ pcie@2,0 {
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x2 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie2_intc 0>,
|
||||
<0 0 0 2 &pcie2_intc 1>,
|
||||
<0 0 0 3 &pcie2_intc 2>,
|
||||
<0 0 0 4 &pcie2_intc 3>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 5>;
|
||||
status = "disabled";
|
||||
|
||||
pcie2_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/* x1 port */
|
||||
@@ -476,16 +496,26 @@ pcie@3,0 {
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x3 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie3_intc 0>,
|
||||
<0 0 0 2 &pcie3_intc 1>,
|
||||
<0 0 0 3 &pcie3_intc 2>,
|
||||
<0 0 0 4 &pcie3_intc 3>;
|
||||
marvell,pcie-port = <2>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 6>;
|
||||
status = "disabled";
|
||||
|
||||
pcie3_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -498,16 +528,26 @@ pcie@4,0 {
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x4 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie4_intc 0>,
|
||||
<0 0 0 2 &pcie4_intc 1>,
|
||||
<0 0 0 3 &pcie4_intc 2>,
|
||||
<0 0 0 4 &pcie4_intc 3>;
|
||||
marvell,pcie-port = <3>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 7>;
|
||||
status = "disabled";
|
||||
|
||||
pcie4_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -76,16 +76,26 @@ pcie1: pcie@1,0 {
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 58>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x1 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 58>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
|
||||
<0 0 0 2 &pcie1_intc 1>,
|
||||
<0 0 0 3 &pcie1_intc 2>,
|
||||
<0 0 0 4 &pcie1_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 5>;
|
||||
status = "disabled";
|
||||
|
||||
pcie1_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -164,7 +164,7 @@ scroll-button {
|
||||
};
|
||||
};
|
||||
|
||||
spi3 {
|
||||
spi-3 {
|
||||
compatible = "spi-gpio";
|
||||
status = "okay";
|
||||
gpio-sck = <&gpio0 25 GPIO_ACTIVE_LOW>;
|
||||
|
||||
@@ -83,16 +83,26 @@ pcie1: pcie@1,0 {
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 58>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x1 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 58>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
|
||||
<0 0 0 2 &pcie1_intc 1>,
|
||||
<0 0 0 3 &pcie1_intc 2>,
|
||||
<0 0 0 4 &pcie1_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 5>;
|
||||
status = "disabled";
|
||||
|
||||
pcie1_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie2: pcie@2,0 {
|
||||
@@ -101,16 +111,26 @@ pcie2: pcie@2,0 {
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 59>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x2 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 59>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie2_intc 0>,
|
||||
<0 0 0 2 &pcie2_intc 1>,
|
||||
<0 0 0 3 &pcie2_intc 2>,
|
||||
<0 0 0 4 &pcie2_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <1>;
|
||||
clocks = <&gateclk 6>;
|
||||
status = "disabled";
|
||||
|
||||
pcie2_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie3: pcie@3,0 {
|
||||
@@ -119,16 +139,26 @@ pcie3: pcie@3,0 {
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 60>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x3 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 60>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie3_intc 0>,
|
||||
<0 0 0 2 &pcie3_intc 1>,
|
||||
<0 0 0 3 &pcie3_intc 2>,
|
||||
<0 0 0 4 &pcie3_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <2>;
|
||||
clocks = <&gateclk 7>;
|
||||
status = "disabled";
|
||||
|
||||
pcie3_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie4: pcie@4,0 {
|
||||
@@ -137,16 +167,26 @@ pcie4: pcie@4,0 {
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 61>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x4 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 61>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie4_intc 0>,
|
||||
<0 0 0 2 &pcie4_intc 1>,
|
||||
<0 0 0 3 &pcie4_intc 2>,
|
||||
<0 0 0 4 &pcie4_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <3>;
|
||||
clocks = <&gateclk 8>;
|
||||
status = "disabled";
|
||||
|
||||
pcie4_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie5: pcie@5,0 {
|
||||
@@ -155,16 +195,26 @@ pcie5: pcie@5,0 {
|
||||
reg = <0x2800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 62>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x5 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 62>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie5_intc 0>,
|
||||
<0 0 0 2 &pcie5_intc 1>,
|
||||
<0 0 0 3 &pcie5_intc 2>,
|
||||
<0 0 0 4 &pcie5_intc 3>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 9>;
|
||||
status = "disabled";
|
||||
|
||||
pcie5_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -98,16 +98,26 @@ pcie1: pcie@1,0 {
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 58>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x1 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 58>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
|
||||
<0 0 0 2 &pcie1_intc 1>,
|
||||
<0 0 0 3 &pcie1_intc 2>,
|
||||
<0 0 0 4 &pcie1_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 5>;
|
||||
status = "disabled";
|
||||
|
||||
pcie1_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie2: pcie@2,0 {
|
||||
@@ -116,16 +126,26 @@ pcie2: pcie@2,0 {
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 59>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x2 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 59>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie2_intc 0>,
|
||||
<0 0 0 2 &pcie2_intc 1>,
|
||||
<0 0 0 3 &pcie2_intc 2>,
|
||||
<0 0 0 4 &pcie2_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <1>;
|
||||
clocks = <&gateclk 6>;
|
||||
status = "disabled";
|
||||
|
||||
pcie2_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie3: pcie@3,0 {
|
||||
@@ -134,16 +154,26 @@ pcie3: pcie@3,0 {
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 60>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x3 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 60>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie3_intc 0>,
|
||||
<0 0 0 2 &pcie3_intc 1>,
|
||||
<0 0 0 3 &pcie3_intc 2>,
|
||||
<0 0 0 4 &pcie3_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <2>;
|
||||
clocks = <&gateclk 7>;
|
||||
status = "disabled";
|
||||
|
||||
pcie3_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie4: pcie@4,0 {
|
||||
@@ -152,16 +182,26 @@ pcie4: pcie@4,0 {
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 61>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x4 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 61>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie4_intc 0>,
|
||||
<0 0 0 2 &pcie4_intc 1>,
|
||||
<0 0 0 3 &pcie4_intc 2>,
|
||||
<0 0 0 4 &pcie4_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <3>;
|
||||
clocks = <&gateclk 8>;
|
||||
status = "disabled";
|
||||
|
||||
pcie4_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie5: pcie@5,0 {
|
||||
@@ -170,16 +210,26 @@ pcie5: pcie@5,0 {
|
||||
reg = <0x2800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 62>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x5 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 62>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie5_intc 0>,
|
||||
<0 0 0 2 &pcie5_intc 1>,
|
||||
<0 0 0 3 &pcie5_intc 2>,
|
||||
<0 0 0 4 &pcie5_intc 3>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 9>;
|
||||
status = "disabled";
|
||||
|
||||
pcie5_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie6: pcie@6,0 {
|
||||
@@ -188,16 +238,26 @@ pcie6: pcie@6,0 {
|
||||
reg = <0x3000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 63>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x6 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 63>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie6_intc 0>,
|
||||
<0 0 0 2 &pcie6_intc 1>,
|
||||
<0 0 0 3 &pcie6_intc 2>,
|
||||
<0 0 0 4 &pcie6_intc 3>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <1>;
|
||||
clocks = <&gateclk 10>;
|
||||
status = "disabled";
|
||||
|
||||
pcie6_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie7: pcie@7,0 {
|
||||
@@ -206,16 +266,26 @@ pcie7: pcie@7,0 {
|
||||
reg = <0x3800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 64>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x7 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 64>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie7_intc 0>,
|
||||
<0 0 0 2 &pcie7_intc 1>,
|
||||
<0 0 0 3 &pcie7_intc 2>,
|
||||
<0 0 0 4 &pcie7_intc 3>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <2>;
|
||||
clocks = <&gateclk 11>;
|
||||
status = "disabled";
|
||||
|
||||
pcie7_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie8: pcie@8,0 {
|
||||
@@ -224,16 +294,26 @@ pcie8: pcie@8,0 {
|
||||
reg = <0x4000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 65>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x8 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 65>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie8_intc 0>,
|
||||
<0 0 0 2 &pcie8_intc 1>,
|
||||
<0 0 0 3 &pcie8_intc 2>,
|
||||
<0 0 0 4 &pcie8_intc 3>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <3>;
|
||||
clocks = <&gateclk 12>;
|
||||
status = "disabled";
|
||||
|
||||
pcie8_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie9: pcie@9,0 {
|
||||
@@ -242,16 +322,26 @@ pcie9: pcie@9,0 {
|
||||
reg = <0x4800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 99>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x9 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 99>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie9_intc 0>,
|
||||
<0 0 0 2 &pcie9_intc 1>,
|
||||
<0 0 0 3 &pcie9_intc 2>,
|
||||
<0 0 0 4 &pcie9_intc 3>;
|
||||
marvell,pcie-port = <2>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 26>;
|
||||
status = "disabled";
|
||||
|
||||
pcie9_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -119,16 +119,26 @@ pcie1: pcie@1,0 {
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 58>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x1 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 58>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
|
||||
<0 0 0 2 &pcie1_intc 1>,
|
||||
<0 0 0 3 &pcie1_intc 2>,
|
||||
<0 0 0 4 &pcie1_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 5>;
|
||||
status = "disabled";
|
||||
|
||||
pcie1_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie2: pcie@2,0 {
|
||||
@@ -137,16 +147,26 @@ pcie2: pcie@2,0 {
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 59>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x2 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 59>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie2_intc 0>,
|
||||
<0 0 0 2 &pcie2_intc 1>,
|
||||
<0 0 0 3 &pcie2_intc 2>,
|
||||
<0 0 0 4 &pcie2_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <1>;
|
||||
clocks = <&gateclk 6>;
|
||||
status = "disabled";
|
||||
|
||||
pcie2_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie3: pcie@3,0 {
|
||||
@@ -155,16 +175,26 @@ pcie3: pcie@3,0 {
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 60>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x3 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 60>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie3_intc 0>,
|
||||
<0 0 0 2 &pcie3_intc 1>,
|
||||
<0 0 0 3 &pcie3_intc 2>,
|
||||
<0 0 0 4 &pcie3_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <2>;
|
||||
clocks = <&gateclk 7>;
|
||||
status = "disabled";
|
||||
|
||||
pcie3_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie4: pcie@4,0 {
|
||||
@@ -173,16 +203,26 @@ pcie4: pcie@4,0 {
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 61>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x4 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 61>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie4_intc 0>,
|
||||
<0 0 0 2 &pcie4_intc 1>,
|
||||
<0 0 0 3 &pcie4_intc 2>,
|
||||
<0 0 0 4 &pcie4_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <3>;
|
||||
clocks = <&gateclk 8>;
|
||||
status = "disabled";
|
||||
|
||||
pcie4_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie5: pcie@5,0 {
|
||||
@@ -191,16 +231,26 @@ pcie5: pcie@5,0 {
|
||||
reg = <0x2800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 62>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x5 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 62>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie5_intc 0>,
|
||||
<0 0 0 2 &pcie5_intc 1>,
|
||||
<0 0 0 3 &pcie5_intc 2>,
|
||||
<0 0 0 4 &pcie5_intc 3>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 9>;
|
||||
status = "disabled";
|
||||
|
||||
pcie5_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie6: pcie@6,0 {
|
||||
@@ -209,16 +259,26 @@ pcie6: pcie@6,0 {
|
||||
reg = <0x3000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 63>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x6 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 63>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie6_intc 0>,
|
||||
<0 0 0 2 &pcie6_intc 1>,
|
||||
<0 0 0 3 &pcie6_intc 2>,
|
||||
<0 0 0 4 &pcie6_intc 3>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <1>;
|
||||
clocks = <&gateclk 10>;
|
||||
status = "disabled";
|
||||
|
||||
pcie6_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie7: pcie@7,0 {
|
||||
@@ -227,16 +287,26 @@ pcie7: pcie@7,0 {
|
||||
reg = <0x3800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 64>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x7 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 64>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie7_intc 0>,
|
||||
<0 0 0 2 &pcie7_intc 1>,
|
||||
<0 0 0 3 &pcie7_intc 2>,
|
||||
<0 0 0 4 &pcie7_intc 3>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <2>;
|
||||
clocks = <&gateclk 11>;
|
||||
status = "disabled";
|
||||
|
||||
pcie7_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie8: pcie@8,0 {
|
||||
@@ -245,16 +315,26 @@ pcie8: pcie@8,0 {
|
||||
reg = <0x4000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 65>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x8 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 65>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie8_intc 0>,
|
||||
<0 0 0 2 &pcie8_intc 1>,
|
||||
<0 0 0 3 &pcie8_intc 2>,
|
||||
<0 0 0 4 &pcie8_intc 3>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <3>;
|
||||
clocks = <&gateclk 12>;
|
||||
status = "disabled";
|
||||
|
||||
pcie8_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie9: pcie@9,0 {
|
||||
@@ -263,16 +343,26 @@ pcie9: pcie@9,0 {
|
||||
reg = <0x4800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 99>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x9 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 99>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie9_intc 0>,
|
||||
<0 0 0 2 &pcie9_intc 1>,
|
||||
<0 0 0 3 &pcie9_intc 2>,
|
||||
<0 0 0 4 &pcie9_intc 3>;
|
||||
marvell,pcie-port = <2>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 26>;
|
||||
status = "disabled";
|
||||
|
||||
pcie9_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie10: pcie@a,0 {
|
||||
@@ -281,16 +371,26 @@ pcie10: pcie@a,0 {
|
||||
reg = <0x5000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupt-names = "intx";
|
||||
interrupts-extended = <&mpic 103>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0
|
||||
0x81000000 0 0 0x81000000 0xa 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &mpic 103>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie10_intc 0>,
|
||||
<0 0 0 2 &pcie10_intc 1>,
|
||||
<0 0 0 3 &pcie10_intc 2>,
|
||||
<0 0 0 4 &pcie10_intc 3>;
|
||||
marvell,pcie-port = <3>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 27>;
|
||||
status = "disabled";
|
||||
|
||||
pcie10_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -122,8 +122,18 @@ pcie0: pcie@1 {
|
||||
bus-range = <0x00 0xff>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &intc 16>;
|
||||
interrupt-names = "intx", "error";
|
||||
interrupts = <16>, <15>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie0_intc 0>,
|
||||
<0 0 0 2 &pcie0_intc 1>,
|
||||
<0 0 0 3 &pcie0_intc 2>,
|
||||
<0 0 0 4 &pcie0_intc 3>;
|
||||
|
||||
pcie0_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie1: pcie@2 {
|
||||
@@ -141,8 +151,18 @@ pcie1: pcie@2 {
|
||||
bus-range = <0x00 0xff>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &intc 18>;
|
||||
interrupt-names = "intx", "error";
|
||||
interrupts = <18>, <17>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
|
||||
<0 0 0 2 &pcie1_intc 1>,
|
||||
<0 0 0 3 &pcie1_intc 2>,
|
||||
<0 0 0 4 &pcie1_intc 3>;
|
||||
|
||||
pcie1_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
|
||||
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x1 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &intc 9>;
|
||||
interrupt-names = "intx", "error";
|
||||
interrupts = <9>, <44>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc 0>,
|
||||
<0 0 0 2 &pcie_intc 1>,
|
||||
<0 0 0 3 &pcie_intc 2>,
|
||||
<0 0 0 4 &pcie_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gate_clk 2>;
|
||||
status = "disabled";
|
||||
|
||||
pcie_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
|
||||
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x1 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &intc 9>;
|
||||
interrupt-names = "intx", "error";
|
||||
interrupts = <9>, <44>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc 0>,
|
||||
<0 0 0 2 &pcie_intc 1>,
|
||||
<0 0 0 3 &pcie_intc 2>,
|
||||
<0 0 0 4 &pcie_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gate_clk 2>;
|
||||
status = "disabled";
|
||||
|
||||
pcie_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -30,12 +30,22 @@ pcie0: pcie@1,0 {
|
||||
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x1 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &intc 9>;
|
||||
interrupt-names = "intx", "error";
|
||||
interrupts = <9>, <44>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie0_intc 0>,
|
||||
<0 0 0 2 &pcie0_intc 1>,
|
||||
<0 0 0 3 &pcie0_intc 2>,
|
||||
<0 0 0 4 &pcie0_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gate_clk 2>;
|
||||
status = "disabled";
|
||||
|
||||
pcie0_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie1: pcie@2,0 {
|
||||
@@ -48,12 +58,22 @@ pcie1: pcie@2,0 {
|
||||
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x2 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &intc 10>;
|
||||
interrupt-names = "intx", "error";
|
||||
interrupts = <10>, <45>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
|
||||
<0 0 0 2 &pcie1_intc 1>,
|
||||
<0 0 0 3 &pcie1_intc 2>,
|
||||
<0 0 0 4 &pcie1_intc 3>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gate_clk 18>;
|
||||
status = "disabled";
|
||||
|
||||
pcie1_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
|
||||
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x1 0 1 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &intc 9>;
|
||||
interrupt-names = "intx", "error";
|
||||
interrupts = <9>, <44>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc 0>,
|
||||
<0 0 0 2 &pcie_intc 1>,
|
||||
<0 0 0 3 &pcie_intc 2>,
|
||||
<0 0 0 4 &pcie_intc 3>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gate_clk 2>;
|
||||
status = "disabled";
|
||||
|
||||
pcie_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -10,6 +10,11 @@ chosen {
|
||||
|
||||
ocp@f1000000 {
|
||||
pinctrl: pin-controller@10000 {
|
||||
/* Non-default UART pins */
|
||||
pmx_uart0: pmx-uart0 {
|
||||
marvell,pins = "mpp4", "mpp5";
|
||||
};
|
||||
|
||||
pmx_power_hdd: pmx-power-hdd {
|
||||
marvell,pins = "mpp10";
|
||||
marvell,function = "gpo";
|
||||
@@ -213,22 +218,11 @@ hdd_power: regulator@2 {
|
||||
&mdio {
|
||||
status = "okay";
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
ethphy1: ethernet-phy@8 {
|
||||
reg = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
ethernet0-port@0 {
|
||||
phy-handle = <ðphy0>;
|
||||
};
|
||||
};
|
||||
|
||||
ð1 {
|
||||
status = "okay";
|
||||
ethernet1-port@0 {
|
||||
|
||||
Reference in New Issue
Block a user