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synced 2026-02-22 04:15:42 -05:00
platform/x86/amd/pmc: Update function names to align with new STB file
With STB now in a separate file, update the function names to match the correct naming schema by removing the _pmc_ prefix where needed. Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Link: https://lore.kernel.org/r/20241108070822.3912689-4-Shyam-sundar.S-k@amd.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
This commit is contained in:
committed by
Ilpo Järvinen
parent
0e914063dd
commit
00a8d00243
@@ -24,7 +24,7 @@
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#define S2D_RSVD_RAM_SPACE 0x100000
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/* STB Registers */
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#define AMD_PMC_STB_PMI_0 0x03E30600
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#define AMD_STB_PMI_0 0x03E30600
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#define AMD_PMC_STB_DUMMY_PC 0xC6000007
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/* STB Spill to DRAM Message Definition */
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@@ -47,32 +47,32 @@ enum s2d_arg {
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S2D_DRAM_SIZE,
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};
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struct amd_pmc_stb_v2_data {
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struct amd_stb_v2_data {
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size_t size;
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u8 data[] __counted_by(size);
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};
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int amd_pmc_write_stb(struct amd_pmc_dev *dev, u32 data)
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int amd_stb_write(struct amd_pmc_dev *dev, u32 data)
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{
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int err;
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err = amd_smn_write(0, AMD_PMC_STB_PMI_0, data);
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err = amd_smn_write(0, AMD_STB_PMI_0, data);
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if (err) {
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dev_err(dev->dev, "failed to write data in stb: 0x%X\n", AMD_PMC_STB_PMI_0);
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dev_err(dev->dev, "failed to write data in stb: 0x%X\n", AMD_STB_PMI_0);
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return pcibios_err_to_errno(err);
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}
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return 0;
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}
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int amd_pmc_read_stb(struct amd_pmc_dev *dev, u32 *buf)
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int amd_stb_read(struct amd_pmc_dev *dev, u32 *buf)
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{
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int i, err;
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for (i = 0; i < FIFO_SIZE; i++) {
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err = amd_smn_read(0, AMD_PMC_STB_PMI_0, buf++);
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err = amd_smn_read(0, AMD_STB_PMI_0, buf++);
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if (err) {
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dev_err(dev->dev, "error reading data from stb: 0x%X\n", AMD_PMC_STB_PMI_0);
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dev_err(dev->dev, "error reading data from stb: 0x%X\n", AMD_STB_PMI_0);
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return pcibios_err_to_errno(err);
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}
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}
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@@ -80,7 +80,7 @@ int amd_pmc_read_stb(struct amd_pmc_dev *dev, u32 *buf)
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return 0;
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}
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static int amd_pmc_stb_debugfs_open(struct inode *inode, struct file *filp)
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static int amd_stb_debugfs_open(struct inode *inode, struct file *filp)
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{
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struct amd_pmc_dev *dev = filp->f_inode->i_private;
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u32 size = FIFO_SIZE * sizeof(u32);
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@@ -91,7 +91,7 @@ static int amd_pmc_stb_debugfs_open(struct inode *inode, struct file *filp)
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if (!buf)
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return -ENOMEM;
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rc = amd_pmc_read_stb(dev, buf);
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rc = amd_stb_read(dev, buf);
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if (rc) {
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kfree(buf);
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return rc;
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@@ -101,8 +101,7 @@ static int amd_pmc_stb_debugfs_open(struct inode *inode, struct file *filp)
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return rc;
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}
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static ssize_t amd_pmc_stb_debugfs_read(struct file *filp, char __user *buf, size_t size,
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loff_t *pos)
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static ssize_t amd_stb_debugfs_read(struct file *filp, char __user *buf, size_t size, loff_t *pos)
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{
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if (!filp->private_data)
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return -EINVAL;
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@@ -111,24 +110,24 @@ static ssize_t amd_pmc_stb_debugfs_read(struct file *filp, char __user *buf, siz
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FIFO_SIZE * sizeof(u32));
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}
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static int amd_pmc_stb_debugfs_release(struct inode *inode, struct file *filp)
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static int amd_stb_debugfs_release(struct inode *inode, struct file *filp)
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{
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kfree(filp->private_data);
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return 0;
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}
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static const struct file_operations amd_pmc_stb_debugfs_fops = {
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static const struct file_operations amd_stb_debugfs_fops = {
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.owner = THIS_MODULE,
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.open = amd_pmc_stb_debugfs_open,
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.read = amd_pmc_stb_debugfs_read,
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.release = amd_pmc_stb_debugfs_release,
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.open = amd_stb_debugfs_open,
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.read = amd_stb_debugfs_read,
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.release = amd_stb_debugfs_release,
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};
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/* Enhanced STB Firmware Reporting Mechanism */
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static int amd_pmc_stb_handle_efr(struct file *filp)
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static int amd_stb_handle_efr(struct file *filp)
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{
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struct amd_pmc_dev *dev = filp->f_inode->i_private;
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struct amd_pmc_stb_v2_data *stb_data_arr;
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struct amd_stb_v2_data *stb_data_arr;
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u32 fsize;
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fsize = dev->dram_size - S2D_RSVD_RAM_SPACE;
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@@ -143,15 +142,15 @@ static int amd_pmc_stb_handle_efr(struct file *filp)
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return 0;
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}
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static int amd_pmc_stb_debugfs_open_v2(struct inode *inode, struct file *filp)
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static int amd_stb_debugfs_open_v2(struct inode *inode, struct file *filp)
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{
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struct amd_pmc_dev *dev = filp->f_inode->i_private;
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u32 fsize, num_samples, val, stb_rdptr_offset = 0;
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struct amd_pmc_stb_v2_data *stb_data_arr;
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struct amd_stb_v2_data *stb_data_arr;
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int ret;
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/* Write dummy postcode while reading the STB buffer */
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ret = amd_pmc_write_stb(dev, AMD_PMC_STB_DUMMY_PC);
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ret = amd_stb_write(dev, AMD_PMC_STB_DUMMY_PC);
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if (ret)
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dev_err(dev->dev, "error writing to STB: %d\n", ret);
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@@ -168,7 +167,7 @@ static int amd_pmc_stb_debugfs_open_v2(struct inode *inode, struct file *filp)
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* platforms that support enhanced dram size reporting.
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*/
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if (dump_custom_stb)
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return amd_pmc_stb_handle_efr(filp);
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return amd_stb_handle_efr(filp);
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/* Get the num_samples to calculate the last push location */
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ret = amd_pmc_send_cmd(dev, S2D_NUM_SAMPLES, &num_samples, dev->s2d_msg_id, true);
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@@ -208,28 +207,28 @@ static int amd_pmc_stb_debugfs_open_v2(struct inode *inode, struct file *filp)
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return 0;
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}
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static ssize_t amd_pmc_stb_debugfs_read_v2(struct file *filp, char __user *buf, size_t size,
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loff_t *pos)
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static ssize_t amd_stb_debugfs_read_v2(struct file *filp, char __user *buf, size_t size,
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loff_t *pos)
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{
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struct amd_pmc_stb_v2_data *data = filp->private_data;
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struct amd_stb_v2_data *data = filp->private_data;
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return simple_read_from_buffer(buf, size, pos, data->data, data->size);
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}
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static int amd_pmc_stb_debugfs_release_v2(struct inode *inode, struct file *filp)
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static int amd_stb_debugfs_release_v2(struct inode *inode, struct file *filp)
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{
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kfree(filp->private_data);
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return 0;
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}
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static const struct file_operations amd_pmc_stb_debugfs_fops_v2 = {
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static const struct file_operations amd_stb_debugfs_fops_v2 = {
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.owner = THIS_MODULE,
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.open = amd_pmc_stb_debugfs_open_v2,
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.read = amd_pmc_stb_debugfs_read_v2,
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.release = amd_pmc_stb_debugfs_release_v2,
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.open = amd_stb_debugfs_open_v2,
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.read = amd_stb_debugfs_read_v2,
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.release = amd_stb_debugfs_release_v2,
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};
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static bool amd_pmc_is_stb_supported(struct amd_pmc_dev *dev)
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static bool amd_is_stb_supported(struct amd_pmc_dev *dev)
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{
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switch (dev->cpu_id) {
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case AMD_CPU_ID_YC:
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@@ -248,7 +247,7 @@ static bool amd_pmc_is_stb_supported(struct amd_pmc_dev *dev)
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}
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}
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int amd_pmc_s2d_init(struct amd_pmc_dev *dev)
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int amd_stb_s2d_init(struct amd_pmc_dev *dev)
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{
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u32 phys_addr_low, phys_addr_hi;
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u64 stb_phys_addr;
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@@ -258,12 +257,12 @@ int amd_pmc_s2d_init(struct amd_pmc_dev *dev)
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if (!enable_stb)
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return 0;
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if (amd_pmc_is_stb_supported(dev)) {
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if (amd_is_stb_supported(dev)) {
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debugfs_create_file("stb_read", 0644, dev->dbgfs_dir, dev,
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&amd_pmc_stb_debugfs_fops_v2);
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&amd_stb_debugfs_fops_v2);
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} else {
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debugfs_create_file("stb_read", 0644, dev->dbgfs_dir, dev,
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&amd_pmc_stb_debugfs_fops);
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&amd_stb_debugfs_fops);
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return 0;
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}
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@@ -671,7 +671,7 @@ static void amd_pmc_s2idle_prepare(void)
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return;
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}
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rc = amd_pmc_write_stb(pdev, AMD_PMC_STB_S2IDLE_PREPARE);
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rc = amd_stb_write(pdev, AMD_PMC_STB_S2IDLE_PREPARE);
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if (rc)
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dev_err(pdev->dev, "error writing to STB: %d\n", rc);
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}
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@@ -690,7 +690,7 @@ static void amd_pmc_s2idle_check(void)
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/* Dump the IdleMask before we add to the STB */
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amd_pmc_idlemask_read(pdev, pdev->dev, NULL);
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rc = amd_pmc_write_stb(pdev, AMD_PMC_STB_S2IDLE_CHECK);
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rc = amd_stb_write(pdev, AMD_PMC_STB_S2IDLE_CHECK);
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if (rc)
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dev_err(pdev->dev, "error writing to STB: %d\n", rc);
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}
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@@ -717,7 +717,7 @@ static void amd_pmc_s2idle_restore(void)
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/* Let SMU know that we are looking for stats */
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amd_pmc_dump_data(pdev);
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rc = amd_pmc_write_stb(pdev, AMD_PMC_STB_S2IDLE_RESTORE);
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rc = amd_stb_write(pdev, AMD_PMC_STB_S2IDLE_RESTORE);
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if (rc)
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dev_err(pdev->dev, "error writing to STB: %d\n", rc);
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@@ -832,7 +832,7 @@ static int amd_pmc_probe(struct platform_device *pdev)
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}
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amd_pmc_dbgfs_register(dev);
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err = amd_pmc_s2d_init(dev);
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err = amd_stb_s2d_init(dev);
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if (err)
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goto err_pci_dev_put;
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@@ -70,9 +70,9 @@ void amd_mp2_stb_deinit(struct amd_pmc_dev *dev);
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#define PCI_DEVICE_ID_AMD_1AH_M60H_ROOT 0x1122
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#define PCI_DEVICE_ID_AMD_MP2_STB 0x172c
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int amd_pmc_s2d_init(struct amd_pmc_dev *dev);
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int amd_pmc_read_stb(struct amd_pmc_dev *dev, u32 *buf);
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int amd_pmc_write_stb(struct amd_pmc_dev *dev, u32 data);
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int amd_stb_s2d_init(struct amd_pmc_dev *dev);
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int amd_stb_read(struct amd_pmc_dev *dev, u32 *buf);
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int amd_stb_write(struct amd_pmc_dev *dev, u32 data);
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int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret);
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#endif /* PMC_H */
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