Ville Syrjälä fdffb7dbc7 drm/i915/psr: Fix BDW PSR AUX CH data register offsets ...

The multiplication got replaced by an addition in some cleanup.
This means we never write the correct data to some of the BDW
PSR data registers and thus we fail to actually wake up the
panel from PSR.

Fixes: 4ab4fa1032 ("drm/i915/psr: Make PSR registers relative to transcoders")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230609141404.12729-3-ville.syrjala@linux.intel.com
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
(cherry picked from commit 460dc4ba14)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

2023-07-04 10:40:21 +01:00

..

drm

drm/i915/psr: Fix BDW PSR AUX CH data register offsets

2023-07-04 10:40:21 +01:00

host1x

Merge tag 'drm/tegra/for-6.4-rc1' of https://gitlab.freedesktop.org/drm/tegra into drm-next

2023-04-06 15:02:17 +02:00

ipu-v3

ipu-v3: Include <linux/io.h>

2023-05-18 11:06:18 +02:00

trace

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vga

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Makefile

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