Caleb James DeLisle 2cc066dbd3 dt-bindings: phy: Document PCIe PHY in EcoNet EN751221 and EN7528 ...

EN751221 and EN7528 SoCs have two PCIe slots, and each one has a PHY
which behaves slightly differently because one slot is Gen1/Gen2 while
the other is Gen1 only.

Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260425173642.406089-2-cjd@cjdns.fr
Signed-off-by: Vinod Koul <vkoul@kernel.org>

2026-05-14 21:15:16 +05:30

..

bindings

dt-bindings: phy: Document PCIe PHY in EcoNet EN751221 and EN7528

2026-05-14 21:15:16 +05:30

changesets.rst

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dynamic-resolution-notes.rst

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index.rst

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kernel-api.rst

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of_unittest.rst

docs: dt: unittest: update to current unittest filenames

2026-02-24 14:59:12 -06:00

overlay-notes.rst

docs: dt: fix grammar and spelling

2025-09-26 15:53:29 -05:00

usage-model.rst

docs: dt: fix grammar and spelling

2025-09-26 15:53:29 -05:00