Gabriel Fernandez 0829ea5af6 drivers: clk: st: Correct the pll-type for A9 for stih418 ...

Add support for new PLL-type for stih418 A9-PLL.
Currently the 407_A9_PLL type being used, it is corrected with this patch
4600c28 PLL allows to reach higher frequencies
so its programming algorithm is extended.

Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

2015-10-08 23:52:59 -07:00

..

clk-flexgen.c

clk: st: fix handling result of of_property_count_strings

2015-10-01 15:21:50 -07:00

clkgen-fsyn.c

drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x

2015-09-17 11:51:43 -07:00

clkgen-mux.c

drivers: clk: st: PLL rate change implementation for DVFS

2015-10-08 23:52:58 -07:00

clkgen-pll.c

drivers: clk: st: Correct the pll-type for A9 for stih418

2015-10-08 23:52:59 -07:00

clkgen.h

drivers: clk: st: PLL rate change implementation for DVFS

2015-10-08 23:52:58 -07:00

Makefile

clk: st: STiH407: Support for Flexgen Clocks

2014-07-28 22:36:24 -07:00