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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-18 13:31:45 -04:00
63fbf275fa
Add support for normalized CXL address translation through ACPI PRM method to support AMD Zen5 platforms. Including a conventions doc that explains how the translation is implemented and for future implementations that need such setup to comply with the current implementation method. cxl: Disable HPA/SPA translation handlers for Normalized Addressing cxl/region: Factor out code into cxl_region_setup_poison() cxl/atl: Lock decoders that need address translation cxl: Enable AMD Zen5 address translation using ACPI PRMT cxl/acpi: Prepare use of EFI runtime services cxl: Introduce callback for HPA address ranges translation cxl/region: Use region data to get the root decoder cxl/region: Add @hpa_range argument to function cxl_calc_interleave_pos() cxl/region: Separate region parameter setup and region construction cxl: Simplify cxl_root_ops allocation and handling cxl/region: Store HPA range in struct cxl_region cxl/region: Store root decoder in struct cxl_region cxl/region: Rename misleading variable name @hpa to @hpa_range Documentation/driver-api/cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement cxl, doc: Moving conventions in separate files cxl, doc: Remove isonum.txt inclusion
25 lines
712 B
Makefile
25 lines
712 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_CXL_BUS) += cxl_core.o
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obj-$(CONFIG_CXL_SUSPEND) += suspend.o
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ccflags-y += -I$(srctree)/drivers/cxl
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CFLAGS_trace.o = -DTRACE_INCLUDE_PATH=. -I$(src)
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cxl_core-y := port.o
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cxl_core-y += pmem.o
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cxl_core-y += regs.o
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cxl_core-y += memdev.o
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cxl_core-y += mbox.o
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cxl_core-y += pci.o
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cxl_core-y += hdm.o
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cxl_core-y += pmu.o
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cxl_core-y += cdat.o
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cxl_core-$(CONFIG_TRACING) += trace.o
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cxl_core-$(CONFIG_CXL_REGION) += region.o
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cxl_core-$(CONFIG_CXL_MCE) += mce.o
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cxl_core-$(CONFIG_CXL_FEATURES) += features.o
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cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) += edac.o
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cxl_core-$(CONFIG_CXL_RAS) += ras.o
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cxl_core-$(CONFIG_CXL_RAS) += ras_rch.o
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cxl_core-$(CONFIG_CXL_ATL) += atl.o
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