Alexandre Demers 193e088015 drm/amdgpu: use proper defines, shifts and masks in DCE6 code ...

By replacing VGA_VSTATUS_CNTL by VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK,
we also need to fix its usage in GMC6.

Note: VGA_VSTATUS_CNTL's binary value was inverted in dce_6_0_sh_mask.h,
so we need to invert its value where it was used.

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2025-04-07 15:18:32 -04:00

..

dce_6_0_d.h

drm/amdgpu: add some required DCE6 registers (v7)

2020-07-27 16:45:39 -04:00

dce_6_0_sh_mask.h

drm/amdgpu: use proper defines, shifts and masks in DCE6 code

2025-04-07 15:18:32 -04:00

dce_8_0_d.h

drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines

2017-01-27 11:12:44 -05:00

dce_8_0_enum.h

drm/amd: add dce8 enum register header

2016-02-10 14:17:02 -05:00

dce_8_0_sh_mask.h

drm/amd/display: Add HDMI_ACP_SEND register

2022-05-26 14:56:32 -04:00

dce_10_0_d.h

drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines

2017-01-27 11:12:44 -05:00

dce_10_0_enum.h

…

dce_10_0_sh_mask.h

drm/amd/display: Add HDMI_ACP_SEND register

2022-05-26 14:56:32 -04:00

dce_11_0_d.h

drm/amdgpu/display/dc: Add ACP_DATA register

2022-06-03 16:45:01 -04:00

dce_11_0_enum.h

drm/amdgpu: add DCE 11.0 register headers

2015-06-03 21:02:54 -04:00

dce_11_0_sh_mask.h

drm/amdgpu/display/dc: Add ACP_DATA register

2022-06-03 16:45:01 -04:00

dce_11_2_d.h

drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines

2017-01-27 11:12:44 -05:00

dce_11_2_enum.h

drm/amd: add DCE 11.2 register headers

2016-05-04 20:23:19 -04:00

dce_11_2_sh_mask.h

drm/amd/display: Add HDMI_ACP_SEND register

2022-05-26 14:56:32 -04:00

dce_12_0_offset.h

drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling

2020-08-26 16:40:18 -04:00

dce_12_0_sh_mask.h

drm/amd/display: Add HDMI_ACP_SEND register

2022-05-26 14:56:32 -04:00