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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-07-23 21:28:16 -04:00
4d3c5cbfe2
Tweak the arm64 code so that the pure NEON intrinsics implementation of XOR is shared between arm64 and ARM. While at it, rename the arm64 specific piece xor-eor3.c to reflect that only the version based on the EOR3 instruction is kept there. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://patch.msgid.link/20260422171655.3437334-13-ardb+git@google.com Signed-off-by: Eric Biggers <ebiggers@kernel.org>
44 lines
1.4 KiB
Makefile
44 lines
1.4 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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ccflags-y += -I $(src)
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obj-$(CONFIG_XOR_BLOCKS) += xor.o
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xor-y += xor-core.o
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xor-y += xor-8regs.o
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xor-y += xor-32regs.o
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xor-y += xor-8regs-prefetch.o
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xor-y += xor-32regs-prefetch.o
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ifeq ($(CONFIG_XOR_BLOCKS_ARCH),y)
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CFLAGS_xor-core.o += -I$(src)/$(SRCARCH)
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endif
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xor-$(CONFIG_ALPHA) += alpha/xor.o
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xor-$(CONFIG_ARM) += arm/xor.o
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ifeq ($(CONFIG_ARM),y)
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xor-$(CONFIG_KERNEL_MODE_NEON) += xor-neon.o arm/xor-neon-glue.o
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endif
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xor-$(CONFIG_ARM64) += xor-neon.o arm64/xor-eor3.o \
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arm64/xor-neon-glue.o
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xor-$(CONFIG_CPU_HAS_LSX) += loongarch/xor_simd.o
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xor-$(CONFIG_CPU_HAS_LSX) += loongarch/xor_simd_glue.o
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xor-$(CONFIG_ALTIVEC) += powerpc/xor_vmx.o powerpc/xor_vmx_glue.o
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xor-$(CONFIG_RISCV_ISA_V) += riscv/xor.o riscv/xor-glue.o
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xor-$(CONFIG_SPARC32) += sparc/xor-sparc32.o
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xor-$(CONFIG_SPARC64) += sparc/xor-sparc64.o sparc/xor-sparc64-glue.o
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xor-$(CONFIG_S390) += s390/xor.o
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xor-$(CONFIG_X86_32) += x86/xor-avx.o x86/xor-sse.o x86/xor-mmx.o
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xor-$(CONFIG_X86_64) += x86/xor-avx.o x86/xor-sse.o
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obj-y += tests/
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CFLAGS_xor-neon.o += $(CC_FLAGS_FPU) -I$(src)/$(SRCARCH)
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CFLAGS_REMOVE_xor-neon.o += $(CC_FLAGS_NO_FPU)
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CFLAGS_arm64/xor-eor3.o += $(CC_FLAGS_FPU)
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CFLAGS_REMOVE_arm64/xor-eor3.o += $(CC_FLAGS_NO_FPU)
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CFLAGS_powerpc/xor_vmx.o += -mhard-float -maltivec \
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$(call cc-option,-mabi=altivec) \
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-isystem $(shell $(CC) -print-file-name=include)
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