Vidya Sagar e32e1e26c4 PCI: Add PCI_PTM_CAP_RES macro ...

Add macro defining Responder capable bit in Precision Time Measurement
capability register.

Link: https://lore.kernel.org/r/20220919143340.4527-2-vidyas@nvidia.com
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Jingoo Han <jingoohan1@gmail.com>

2022-10-27 14:40:59 +02:00

..

asm-generic

hugetlb_encode.h: fix undefined behaviour (34 << 26)

2022-10-03 14:02:55 -07:00

drm

drm/amdgpu: add MES and MES-KIQ version in debugfs

2022-09-19 15:10:04 -04:00

linux

PCI: Add PCI_PTM_CAP_RES macro

2022-10-27 14:40:59 +02:00

misc

Merge tag 'v6.1-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6

2022-10-10 13:04:25 -07:00

mtd

Merge tag 'for-linus-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs

2022-10-14 18:23:23 -07:00

rdma

RDMA/rxe: Remove redundant num_sge fields

2022-09-27 10:15:24 -03:00

scsi

scsi: scsi_transport_fc: Adjust struct fc_nl_event flex array usage

2022-09-25 12:52:48 -04:00

sound

ALSA: Remove some left-over license text in include/uapi/sound/

2022-09-27 08:42:50 +02:00

video

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xen

Improve docs for IOCTL_GNTDEV_MAP_GRANT_REF

2022-02-03 08:23:32 +01:00

Kbuild

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