Qili Lu f5a972dfe3 drm/amd/display: fix dccg root clock optimization related hang ...

[Why]
enable dpp rcg before we disable dppclk in hw_init cause system
hang/reboot

[How]
we remove dccg rcg related code from init into a separate function and
call it after we init pipe

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Qili Lu <qili.lu@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2024-09-06 17:41:07 -04:00

..

drm

drm/amd/display: fix dccg root clock optimization related hang

2024-09-06 17:41:07 -04:00

host1x

driver core: have match() callback in struct bus_type take a const *

2024-07-03 15:16:54 +02:00

ipu-v3

Merge tag 'driver-core-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

2024-07-25 10:42:22 -07:00

trace

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vga

drm: Do delayed switcheroo in drm_lastclose()

2024-08-13 16:21:07 +02:00

Makefile

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