Ashutosh Dixit ec02e49f21 drm/xe/rtp: Whitelist OAMERT MMIO trigger registers ...

Whitelist OAMERT registers to enable userspace to execute MMIO triggers on
OAMERT units. Registers are whitelisted for compute and copy class engines.

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patch.msgid.link/20251205212613.826224-3-ashutosh.dixit@intel.com

2025-12-16 17:08:26 -08:00

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drm

drm/xe/rtp: Whitelist OAMERT MMIO trigger registers

2025-12-16 17:08:26 -08:00

host1x

gpu: host1x: Syncpoint interrupt performance optimization

2025-11-14 18:27:19 +01:00

ipu-v3

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nova-core

gpu: nova-core: make formatting compatible with rust tree

2025-11-17 12:56:36 +00:00

trace

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vga

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Makefile

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