Tomi Valkeinen e7e24df471 drm/omap: tiler: fix race condition with engine->async ...

The tiler irq handler uses engine->async value, but the code that sets
engine->async and enables the interrupt does not have a barrier. This
may cause the irq handler to see the old value of engine->async, causing
memory corruption.

Reported-by: Harinarayan Bhatta <harinarayan@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

2015-03-24 13:50:56 +02:00

..

drm

drm/omap: tiler: fix race condition with engine->async

2015-03-24 13:50:56 +02:00

host1x

gpu: host1x: Provide a proper struct bus_type

2015-01-27 10:09:14 +01:00

ipu-v3

gpu: ipu-v3: do not divide by zero if the pixel clock is too large

2015-02-23 17:18:59 +01:00

vga

Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2014-10-13 16:23:15 +02:00

Makefile

gpu: host1x: Provide a proper struct bus_type

2015-01-27 10:09:14 +01:00