Files
linux/drivers
Jae Hyun Yoo e76e56823a clk:aspeed: Fix reset bits for PCI/VGA and PECI
This commit fixes incorrect setting of reset bits for PCI/VGA and
PECI modules.

1. Reset bit for PCI/VGA is 8.
2. PECI reset bit is missing so added bit 10 as its reset bit.

Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Fixes: 15ed8ce5f8 ("clk: aspeed: Register gated clocks")
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-05-15 15:02:23 -07:00
..
2018-03-27 09:51:22 +02:00
2018-04-11 10:28:39 -07:00
2018-03-29 13:38:10 +03:00