Mukul Joshi e3b8d8cc8c drm/amdgpu: Fix SHMEM alignment mode for GFX 12.1.0 ...

Alignment mode in SHMEM config register is only a single bit
value on GFX 12.1.0 instead of 2 bits in previous asics.
Add a new enum and use the correct value of SHMEM alignment mode
when programming the SHMEM config register.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2025-12-08 14:25:34 -05:00

..

drm

drm/amdgpu: Fix SHMEM alignment mode for GFX 12.1.0

2025-12-08 14:25:34 -05:00

host1x

gpu: host1x: Syncpoint interrupt performance optimization

2025-11-14 18:27:19 +01:00

ipu-v3

gpu: ipu-v3: Switch to irq_find_mapping()

2025-05-16 21:06:12 +02:00

nova-core

gpu: nova-core: make formatting compatible with rust tree

2025-11-17 12:56:36 +00:00

trace

gpu/trace: make TRACE_GPU_MEM configurable

2025-07-08 09:34:47 -07:00

vga

vga_switcheroo: Use pci_is_display()

2025-07-17 15:30:13 -05:00

Makefile

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