Bjorn Helgaas dde4b05e26 Merge branch 'pci/controller/mediatek-gen3' ...

- Add optional sys clock ready time setting to avoid sys_clk_rdy signal
  glitching in MT6991 and MT8196 (AngeloGioacchino Del Regno)

- Add DT binding and driver support for MT6991 and MT8196 (AngeloGioacchino
  Del Regno)

* pci/controller/mediatek-gen3:
  PCI: mediatek-gen3: Add support for MediaTek MT8196 SoC
  dt-bindings: PCI: mediatek-gen3: Add support for MT6991/MT8196
  PCI: mediatek-gen3: Implement sys clock ready time setting

2025-10-03 12:13:19 -05:00

..

bindings

Merge branch 'pci/controller/mediatek-gen3'

2025-10-03 12:13:19 -05:00

changesets.rst

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dynamic-resolution-notes.rst

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index.rst

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kernel-api.rst

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of_unittest.rst

docs: dt: unittest: Correct SELFTEST to UNITTEST

2025-01-03 15:25:56 -06:00

overlay-notes.rst

docs: dt: Update overlay file extension

2025-04-25 06:52:53 -05:00

usage-model.rst

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