Files
linux/drivers
Jagan Teki db75489346 clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width
MUX bits for MMC clock register range are 25:24 where 24 is shift
and 2 is width So fix the width number from 3 to 2.

Fixes: 524353ea48 ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-11-05 09:41:27 +01:00
..
2018-10-16 11:13:50 +02:00
2018-10-31 08:54:16 -07:00
2018-10-31 08:54:16 -07:00
2018-10-31 08:54:16 -07:00
2018-10-31 08:54:16 -07:00