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4800046b56
The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S (r9a08g045), with the following differences: - It lacks the time capture functionality - The maximum supported periodic interrupt frequency is 128Hz instead of 256Hz - It requires two reset lines instead of one Add new compatible string "renesas,r9a09g057-rtca3" for RZ/V2H and update the binding accordingly: - Allow "resets" to contain one or two entries depending on the SoC. - Add "reset-names" property, but make it required only for RZ/V2H. Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251107210706.45044-2-ovidiu.panait.rb@renesas.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
121 lines
2.6 KiB
YAML
121 lines
2.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/rtc/renesas,rz-rtca3.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RTCA-3 Real Time Clock
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maintainers:
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- Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
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properties:
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compatible:
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items:
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- enum:
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- renesas,r9a08g045-rtca3 # RZ/G3S
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- renesas,r9a09g057-rtca3 # RZ/V2H
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- const: renesas,rz-rtca3
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: Alarm interrupt
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- description: Periodic interrupt
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- description: Carry interrupt
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interrupt-names:
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items:
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- const: alarm
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- const: period
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- const: carry
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clocks:
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items:
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- description: RTC bus clock
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- description: RTC counter clock
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clock-names:
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items:
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- const: bus
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- const: counter
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power-domains:
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maxItems: 1
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resets:
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minItems: 1
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maxItems: 2
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reset-names:
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minItems: 1
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maxItems: 2
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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- power-domains
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- resets
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allOf:
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- $ref: rtc.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: renesas,r9a08g045-rtca3
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then:
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properties:
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resets:
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items:
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- description: VBATTB module reset
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reset-names:
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const: vbattb
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- if:
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properties:
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compatible:
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contains:
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const: renesas,r9a09g057-rtca3
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then:
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properties:
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resets:
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items:
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- description: RTC reset
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- description: Reset for the RTEST registers
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reset-names:
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items:
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- const: rtc
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- const: rtest
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required:
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- reset-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r9a08g045-cpg.h>
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#include <dt-bindings/clock/renesas,r9a08g045-vbattb.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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rtc@1004ec00 {
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compatible = "renesas,r9a08g045-rtca3", "renesas,rz-rtca3";
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reg = <0x1004ec00 0x400>;
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interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "alarm", "period", "carry";
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clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattclk VBATTB_VBATTCLK>;
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clock-names = "bus", "counter";
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power-domains = <&cpg>;
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resets = <&cpg R9A08G045_VBAT_BRESETN>;
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reset-names = "vbattb";
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};
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