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df63e0120b
Add docs on how CXL capacity interacts with CMA and HugeTLB allocation interfaces. Signed-off-by: Gregory Price <gourry@gourry.net> Link: https://patch.msgid.link/20250512162134.3596150-17-gourry@gourry.net Signed-off-by: Dave Jiang <dave.jiang@intel.com>