Files
linux/arch/x86/include/asm
Peter Zijlstra 69d927bba3 x86/atomic: Fix smp_mb__{before,after}_atomic()
Recent probing at the Linux Kernel Memory Model uncovered a
'surprise'. Strongly ordered architectures where the atomic RmW
primitive implies full memory ordering and
smp_mb__{before,after}_atomic() are a simple barrier() (such as x86)
fail for:

	*x = 1;
	atomic_inc(u);
	smp_mb__after_atomic();
	r0 = *y;

Because, while the atomic_inc() implies memory order, it
(surprisingly) does not provide a compiler barrier. This then allows
the compiler to re-order like so:

	atomic_inc(u);
	*x = 1;
	smp_mb__after_atomic();
	r0 = *y;

Which the CPU is then allowed to re-order (under TSO rules) like:

	atomic_inc(u);
	r0 = *y;
	*x = 1;

And this very much was not intended. Therefore strengthen the atomic
RmW ops to include a compiler barrier.

NOTE: atomic_{or,and,xor} and the bitops already had the compiler
barrier.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-06-17 12:09:59 +02:00
..
2018-12-03 10:49:13 +01:00
2018-03-20 10:01:57 +01:00
2019-05-10 12:33:09 -04:00
2018-08-15 13:44:10 -07:00
2019-04-16 12:26:18 +02:00
2017-12-22 20:13:04 +01:00
2019-04-22 11:42:59 +02:00
2018-10-31 08:54:12 -07:00
2017-12-22 20:13:01 +01:00
2019-01-16 12:43:08 +01:00
2018-10-14 11:11:22 +02:00
2018-07-20 01:11:45 +02:00
2018-11-04 00:54:34 +01:00
2018-03-20 10:01:57 +01:00
2019-04-10 09:53:31 +02:00
2019-04-11 16:21:51 +02:00
2019-05-08 13:13:57 +02:00